SM5846AP datasheet(34/36 Pages) NPC

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SM5846AP

NIPPON PRECISION CIRCUITS—34

Microprocessor Interface

Microprocessor interface pins

When MDS is LOW, the SM5846AP is controlled by

internal ﬂags set by serial data transferred over the

microprocessor interface comprising MDLE, MDCK

and MDT.

Internal control ﬂag serial data on MDT is input into

an internal shift register on the rising edge of

MDCK. After 8-bit data has been input, the data in

the shift register is stored in one of four internal ﬂag

registers on the rising edge of MDLE latch enable.

The address of the ﬂag register is derived by decod-

ing bits 1 to 3 of the 8-bit data.

Microprocessor interface

Microprocessor interface data input timing

MDCK and MDLE can also follow the dotted lines above

Pin name

Function

MDLE

Microprocessor data latch enable input

MDCK

Microprocessor data transfer clock input

MDT

Serial data input

Pin name

Function

Mode flag1

D-ATT Attenation

MDT

MDCK

8bit SIPO Shift Register

8bit Register

Mode flag2

Mode flag3

Decoder

MDLE

bit1

bit2

bit3

bit4

bit5

bit6

bit7

bit8

MDLE

MDCK

MDT

MSB

LSB

SM5846AP 数据表(PDF) 34 Page - Nippon Precision Circuits Inc

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SM5846AP 数据表(PDF) 34 Page - Nippon Precision Circuits Inc

SM5846AP 数据表(HTML) 34 Page - Nippon Precision Circuits Inc

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