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REF3012 数据表(PDF) 16 Page - Texas Instruments |
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REF3012 数据表(HTML) 16 Page - Texas Instruments |
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16 / 26 page ![]() ±200 ±150 ±100 ±50 0 50 100 150 ±6 ±5 ±4 ±3 ±2 ±1 0 1 2 3 4 5 6 Input Voltage (V) C003 0 0.25 0.5 0.75 1 1.25 ±6 ±5 ±4 ±3 ±2 ±1 0 1 2 3 4 5 6 Input Voltage (V) C001 -0.00035 -0.0003 -0.00025 -0.0002 -0.00015 -0.0001 ±6 ±5 ±4 ±3 ±2 ±1 0 1 2 3 4 5 6 Input Voltage (V) C00 REF3012, REF3020, REF3025, REF3030, REF3033, REF3040 SBVS032G – MARCH 2002 – REVISED NOVEMBER 2015 www.ti.com Typical Application (continued) 9.2.1 Design Requirements • Supply Voltage: 3.3 V • Maximum Input Voltage: ±6 V • Specified Input Voltage: ±5 V • ADC Reference Voltage: 1.25 V The goal for this design is to accurately condition a ±5-V bipolar input voltage into a voltage suitable for conversion by a low-voltage ADC with a 1.25-V reference voltage, VREF, and an input voltage range of VREF / 2. The circuit should function with reduced performance over a wider input range of at least ±6 V to allow for easier protection of overvoltage conditions. 9.2.2 Detailed Design Procedure Figure 30 depicts a simplified schematic for this design showing the MSP430 ADC inputs and full input conditioning circuitry. The ADC is configured for a bipolar measurement where final conversion result is the differential voltage between the voltage at the positive and negative ADC inputs. The bipolar, GND referenced input signal must be level-shifted and attenuated by the op amp so that the output is biased to VREF / 2 and has a differential voltage that is within the ±VREF / 2 input range of the ADC. 9.2.3 Application Curves Figure 31. OPA317 Output Voltage vs Input Voltage Figure 32. OPA317 Output Voltage Error vs Input Voltage Figure 33. Output Code Error vs Input Voltage 16 Submit Documentation Feedback Copyright © 2002–2015, Texas Instruments Incorporated Product Folder Links: REF3012 REF3020 REF3025 REF3030 REF3033 REF3040 |
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