EM3587-RTR datasheet(47/59 Pages) SILABS

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EM358x

Rev 1.0

PB0

I/O

Digital I/O

VREF

Analog O ADC reference output

Enable analog function with GPIO_PBCFGL[3:0]

VREF

Analog I

ADC reference input

Enable analog function with GPIO_PBCFGL[3:0]

Enable reference output with an Ember system function

IRQA

External interrupt source A

TRACEDATA2

(see also Pin 26)

Synchronous CPU trace data bit 2

Select 4-wire synchronous trace interface in ARM core

Enable trace interface in ARM core

Select alternate output function with GPIO_PBCFGL[3:0]

TIM1CLK

Timer 1 external clock input

TIM2MSK

Timer 2 external clock mask input

VDD_PADS

Power

Pads supply (2.1–3.6 V)

PC1

I/O

Digital I/O

ADC3

Analog

ADC Input 3

Enable analog function with GPIO_PCCFGL[7:4]

TRACEDATA3

(see also Pin 27)

Synchronous CPU trace data bit 3

Select 1-, 2- or 4-wire synchronous trace interface in ARM core

Enable trace interface in ARM core

Select alternate output function with GPIO_PCCFGL[7:4]

VDD_MEM

Power

1.8 V supply (flash, RAM)

PC0

I/O

High

current

Digital I/O

Either enable with GPIO_DBGCFG[5],



or enable Serial Wire mode (see JTMS description, Pin 35) and disable

TRACEDATA1

JRST

JTAG reset input from debugger

Selected when in JTAG mode (default mode, see JTMS description) and

TRACEDATA1 is disabled

Internal pull-up is enabled

IRQD1

Default external interrupt source D.

TRACEDATA1

Synchronous CPU trace data bit 1

Select 2- or 4-wire synchronous trace interface in ARM core

Enable trace interface in ARM core

Select alternate output function with GPIO_PCCFGL[3:0]

Table 6.1. EM358x Pin Descriptions (Continued)

Pin #

Signal

Direction

Description

Note:

1. IRQC and IRQD external interrupts can be mapped to any digital I/O pin using the GPIO_IRQCSEL and

GPIO_IRQDSEL registers.

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EM3587-RTR 数据表(PDF) 47 Page - Silicon Laboratories

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