 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
RPC564L60L5BOSY 数据表(PDF) 113 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
RPC564L60L5BOSY 数据表(HTML) 113 Page - STMicroelectronics |
|
|
113 / 137 page  DocID026934 Rev 1 113/137 RPC56EL60L5 Electrical characteristics 136 3.19.2 Reset sequence description The figures in this section show the internal states of the chip during the five different reset sequences. The doted lines in the figures indicate the starting point and the end point for which the duration is specified in Table 30. The start point and end point conditions as well as the reset trigger mapping to the different reset sequences is specified in Section 3.19.3. With the beginning of DRUN mode the first instruction is fetched and executed. At this point application execution starts and the internal reset sequence is finished. The figures below show the internal states of the chip during the execution of the reset sequence and the possible states of the signal pin RESET. Note: RESET is a bidirectional pin. The voltage level on this pin can either be driven low by an external reset generator or by the chip internal reset circuitry. A high level on this pin can only be generated by an external pull up resistor which is strong enough to overdrive the weak internal pull down resistor. The rising edge on RESET in the following figures indicates the time when the device stops driving it low. The reset sequence durations given in table Table 30 are applicable only if the internal reset sequence is not prolonged by an external reset generator keeping RESET asserted low beyond the last PHASE3. Figure 12. Destructive Reset Sequence, BIST enabled Figure 13. Destructive Reset Sequence, BIST disabled PHASE3 BIST PHASE1,2 PHASE0 PHASE1,2 PHASE3 Establish IRC and PWR Flash init Device Config Self Test Setup DRUN LBIST MBIST Flash init Device Config Application Execution TDRB, min < TReset < TDRB, max Reset Sequence Start Condition Reset Sequence Trigger RESET_B RESET PHASE3 PHASE1,2 PHASE0 Establish IRC and PWR Flash init Device Config DRUN Application Execution TDR, min < TReset < TDR, max Reset Sequence Trigger Reset Sequence Start Condition RESET_B RESET |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
