STCOM05 datasheet(19/58 Pages) STMICROELECTRONICS

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STCOM

Description

General purpose analog-to-digital converter (ADC)

One 12-bit SAR ADC working at a maximum conversion rate of 2 Msps is embedded in the

STCOM. The ADC has 6 external available input channels performing conversion in

a single, continuous or scan mode. The core accesses to the peripheral through a 4x12-bit

FIFO interface.

The ADC can be served by the DMA controller. Additional 2 channels are internally used to

monitor the VBAT and the low power temperature sensor.

1.4

Cryptographic engine (CRYP)

The STCOM embeds an advanced hardware AES peripheral which implements an

advanced standard cryptographic algorithm according to the NIST FIPS 197. The block

processes 128-bit data blocks using a key with the following possible sizes: 128, 192, 256

bits. The peripheral also supports the following modes: “Electronic Code Book” (ECB),

“Cipher Block Chaining” (CBC), “Counter “mode (CTR), “Galois/Counter Mode” (GCM),

GMAC and CCM modes.

The peripheral is able to encrypt and decrypt data. Interrupt can be generated when one

operation is finished.

1.4.1

True random number generator (TRNG)

The STCOM embeds a TRNG processor based on a continuous analog noise that provides

a random 16-bit value. To avoid pseudo random sequences, two consecutive accesses

have to be performed when the ready bit in the status register is set to 1.

1.4.2

Pseudo random number generator (PRNG)

The STCOM embeds a PRNG processor that provides a pseudo random 32-bit value. Initial

seed can be configured by software.

1.5

Interprocessor communication (IPC)

The Cortex™-M4 core and the real-time engine communicate by means of an additional

8 kByte shared static RAM. This memory can be accessed by the two cores through an

interprocessor communication block that guarantees coherent and consistent read and

modify operations, to provide several functionalities to the system, among the others:



Configuration of real-time engine modes and functionalities during the normal working

operations



Data and information exchange between the Cortex™-M4 and real-time engine in both

directions.



The Cortex™-M4 wake up from a low power mode triggered by the real-time engine.

The real-time engine wakes up from a low power mode triggered by the Cortex™-M4.

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