L6699D datasheet(8/38 Pages) STMICROELECTRONICS

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Pin connections

L6699

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Doc ID 022835 Rev 2

Figure 3.

Typical system block diagram

GND

Chip ground. Current return for both the low-side gate-drive current and the

bias current of the IC. All of the ground connections of the bias components

should be tied to a track going to this pin and kept separate from any pulsed

current return.

LVG

Low-side gate-drive output. The driver is capable of 0.3 A min. source and 0.8 A

min. sink peak current to drive the lower MOSFET of the half bridge leg. The pin

is actively pulled to GND during UVLO.

VCC

Supply voltage of both the signal part of the IC and the low-side gate driver.

Sometimes a small bypass capacitor (0.1 µF typ.) to GND may be useful to

obtain a clean bias voltage for the signal part of the IC.

N.C.

High voltage spacer. The pin is not internally connected to isolate the high

voltage pin and ease compliance with safety regulations (creepage distance) on

the PCB.

OUT

High-side gate-drive floating ground. Current return for the high-side gate-drive

current. Lay out the connection of this pin carefully to avoid too large spikes

below ground.

HVG

High-side floating gate-drive output. The driver is capable of 0.3 A min. source

and 0.8 A min. sink peak current to drive the upper MOSFET of the half bridge

leg. A resistor internally connected to pin 14 (OUT) ensures that the pin is not

floating during UVLO.

VBOOT

High-side gate-drive floating supply voltage. The bootstrap capacitor connected

between this pin and pin 14 (OUT) is fed by an internal synchronous bootstrap

diode driven in-phase with the low-side gate-drive. This patented structure

replaces the normally used external diode.

Table 4.

Pin functions (continued)

Name

Function

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