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STM32F401CB 数据表(PDF) 111 Page - STMicroelectronics |
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STM32F401CB 数据表(HTML) 111 Page - STMicroelectronics |
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111 / 134 page ![]() DocID024738 Rev 5 111/134 STM32F401xB STM32F401xC Electrical characteristics 113 6.3.22 VBAT monitoring characteristics 6.3.23 Embedded reference voltage The parameters given in Table 75 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 14. 6.3.24 SD/SDIO MMC card host interface (SDIO) characteristics Unless otherwise specified, the parameters given in Table 77 for the SDIO/MMC interface are derived from tests performed under the ambient temperature, fPCLK2 frequency and VDD supply voltage conditions summarized in Table 14, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 10 • Capacitive load C = 30 pF • Measurement points are done at CMOS levels: 0.5VDD Table 74. VBAT monitoring characteristics Symbol Parameter Min Typ Max Unit R Resistor bridge for VBAT -50- K Ω Q Ratio on VBAT measurement - 4 - Er(1) Error on Q –1 - +1 % TS_vbat(2)(2) ADC sampling time when reading the VBAT 1 mV accuracy 5- - µs 1. Guaranteed by design. 2. Shortest sampling time can be determined in the application by multiple iterations. Table 75. Embedded internal reference voltage Symbol Parameter Conditions Min Typ Max Unit VREFINT Internal reference voltage –40 °C < TA < +105 °C 1.18 1.21 1.24 V TS_vrefint(1) ADC sampling time when reading the internal reference voltage -10 - - µs VRERINT_s(2) Internal reference voltage spread over the temperature range VDD = 3V ± 10mV - 3 5 mV TCoeff(2) Temperature coefficient - - 30 50 ppm/°C tSTART(2) Startup time - - 6 10 µs 1. Shortest sampling time can be determined in the application by multiple iterations. 2. Guaranteed by design. Table 76. Internal reference voltage calibration values Symbol Parameter Memory address VREFIN_CAL Raw data acquired at temperature of 30 °C VDDA = 3.3 V 0x1FFF 7A2A - 0x1FFF 7A2B |
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