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TUSB8041RGCT 数据表(PDF) 29 Page - Texas Instruments |
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TUSB8041RGCT 数据表(HTML) 29 Page - Texas Instruments |
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29 / 48 page  USB_SSTXP_UP USB_SSTXM_UP VBUS CAP_UP_TXM CAP_UP_TXP USB_SSRXP_UP USB_SSRXM_UP USB_DP_UP USB_DM_UP TUSB8041 U1A USB_VBUS 48 USB_DP_UP 53 USB_DM_UP 54 USB_SSTXP_UP 55 USB_SSTXM_UP 56 USB_SSRXP_UP 58 USB_SSRXM_UP 59 FULLPWRMGMTZ/SMBA1/SS_UP 40 GANGED/SMBA2/HS_UP 42 C1 10uF C3 0.1uF 0201 C4 0.1uF R3 4.7K 0402 5% J1 USB3_TYPEB_CONNECTOR VBUS 1 DM 2 DP 3 GND 4 SSTXN 5 SSTXP 6 GND 7 SSRXN 8 SSRXP 9 SHIELD0 10 SHIELD1 11 R5 1M 0402 5% R4 4.7K 0402 5% C5 0.001uF R2 10K 1% 0402 1% R1 90.9K 0402 1% C2 0.1uF 0201 TUSB8041 www.ti.com SLLSEE4D – JUNE 2014 – REVISED JANUARY 2016 Typical Application (continued) 9.2.1.1 Design Requirements Table 48. Design Parameters DESIGN PARAMETER EXAMPLE VALUE VDD Supply 1.1V VDD33 Supply 3.3V Upstream Port USB Support (SS, HS, FS) SS, HS, FS Downstream Port 1 USB Support (SS, HS, FS, LS) SS, HS, FS, LS Downstream Port 2 USB Support (SS, HS, FS, LS) SS, HS, FS, LS Downstream Port 3 USB Support (SS, HS, FS, LS) SS, HS, FS, LS Downstream Port 4 USB Support (SS, HS, FS, LS) SS, HS, FS, LS Number of Removable Downstream Ports 4 Number of Non-Removable Downstream Ports 0 Full Power Management of Downstream Ports Yes. (FULLPWRMGMTZ = 0) Individual Control of Downstream Port Power Switch Yes. (GANGED = 0) Power Switch Enable Polarity Active High. (PWRCTL_POL = 1) Battery Charge Support for Downstream Port 1 Yes Battery Charge Support for Downstream Port 2 Yes Battery Charge Support for Downstream Port 3 Yes Battery Charge Support for Downstream Port 4 Yes I2C EEPROM Support No. 24MHz Clock Source Crystal 9.2.1.2 Detailed Design Procedure 9.2.1.2.1 Upstream Port Implementation The upstream of the TUSB8041 is connected to a USB3 Type B connector. This particular example has GANGED pin and FULLPWRMGMTZ pin pulled low which results in individual power support each downstream port. The VBUS signal from the USB3 Type B connector is feed through a voltage divider. The purpose of the voltage divider is to make sure the level meets USB_VBUS input requirements Figure 5. Upstream Port Implementation Copyright © 2014–2016, Texas Instruments Incorporated Submit Documentation Feedback 29 |
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