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VD5377CBSW 数据表(PDF) 63 Page - STMicroelectronics |
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VD5377CBSW 数据表(HTML) 63 Page - STMicroelectronics |
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63 / 88 page ![]() Doc ID 022952 Rev 2 63/88 VD5377 Electrical characteristics Figure 27. I2C timing characteristics tf Fall time of SCL, SDA 20+0.1 Cb 300 ns tsu;sto Set-up time for a stop 0.6 µs Cb Capacitive load of each bus line (SCL, SDA) - 400 pF Table 36. I2C timing characteristics (continued) Symbol Parameter Minimum Maximum Unit SDA SCL thd;sta tr thigh tf tsu;dat thd;dat tsu;sta tsu;sto ... ... thd;sta tlow tbuf stop start stop start All values referred to the minimum input level (high) = 0.7 VDD, and maximum input level (low) = 0.3 VDD |
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