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VD5377CBSW 数据表(PDF) 80 Page - STMicroelectronics |
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VD5377CBSW 数据表(HTML) 80 Page - STMicroelectronics |
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80 / 88 page ![]() I2C register map VD5377 80/88 Doc ID 022952 Rev 2 7c DEVADDR i2cs_index_auto_inc_ en 0 PRW 01 Auto Increment function i2cs_dev_addr 7:1 PRW 53 I2C device address 80 FW_TOP_REVISION ucFwTopRevision 7:0 RW 20 System level firmware revision 81 PERSONAL_ CONFIG ucPersonalConfig 7:0 RW 00 Result of the I2C_SEL[20] pad decoding done at start-up. 0 = I2C device address = 0xA6 + config 0 1 = I2C device address = 0xA6 (reserved) 2 = I2C device address = 0xC6 + config 2 3 = I2C device address = 0xD6 + config 3 4 = I2C device address = 0xE6 + config 4 5 = I2C device address = 0x36 + config 5 6 = I2C device address = 0x46 + config 6 7 = I2C device address = 0x20 + config 7 82 POWER_MODE_ CONTROL reserved 1:0 00 Do not modify these bits. ucNbSleepState 5:4 RW 03 In AUTOMATIC power mode, number of sleep states. Table 38. I2C register map (continued) Addr (Hex) Register name SIgnal name Bit Type Default (Hex) Comment |
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