GS6151 datasheet(35/77 Pages) SEMTECH

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GS6151

Final Data Sheet

Rev.4

PDS-060389

August 2015

35 of 77

Semtech

Proprietary & Confidential

www.semtech.com

4.11.7 Single Read/Write Access

Single read/write access timing for the GSPI interface is shown in Figure 4-11 to

Figure 4-15.

When performing a single read or write access, one Data Word is read from/written to

the device per access. Each access is a minimum of 32-bits long, consisting of a

Command Word and a single Data Word. The read or write cycle begins with a

high-to-low transition of the CS pin. The read or write access is terminated by a

low-to-high transition of the CS pin.

The maximum interface clock rate is 27MHz and the inter-command delay time

indicated in the figures as tcmd, is a minimum of 4 SCLK clock cycles. After modifying

values in HOST_CONFIG, the inter-command delay time, tcmd_GSPI_config, is a minimum

of 5 SCLK clock cycles.

For read access, the time from the last bit of the Command Word to the start of the data

output, as defined by t5, corresponds to no less than 5 SCLK clock cycles at 27MHz.

Figure 4-11: GSPI Write Timing – Single Write Access with Loop-Through Operation (default)

Figure 4-12: GSPI Write Timing – Single Write Access with GSPI Link-Disable Operation

Figure 4-13: GSPI Write Timing – Single Write Access with Bus-Through Operation

SCLK

SDIN

SDOUT

COMMAND

DATA

COMMAND

cmd

SCLK

SDIN

SDOUT

COMMAND

DATA

COMMAND

cmd

SCLK

SDIN

SDOUT

COMMAND

DATA

COMMAND

High-z

cmd

High-Z

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