GS6151 datasheet(21/77 Pages) SEMTECH

21 / 77 page

GS6151

Final Data Sheet

Rev.4

PDS-060389

August 2015

21 of 77

Semtech

Proprietary & Confidential

www.semtech.com

4.3.2.1 Synchronous and Asynchronous Lock Time

Asynchronous lock time is defined as the time it takes the device to lock when a signal

is first applied to the serial digital inputs, or when the signal rate changes.

The synchronous lock time is defined as the time it takes the device to lock to a signal

which has been momentarily interrupted.

The asynchronous and synchronous lock times are defined in Table 2-3: AC Electrical

Characteristics.

To qualify for synchronous lock time, the maximum interruption time of the signal is

10μs for a 270Mb/s signal. 1.485Gb/s, 2.97Gb/s, and 5.94Gb/s signals, as well as their

ƒ/1.001 components, have a maximum interruption time of 6μs. The new signal, after

interruption, must have the same frequency as the original signal but can have arbitrary

phase.

4.3.3 Rate Detection

The GS6151 can be manually forced to lock to a specific supported data rate, or

automatically search for and lock to supported rates. The selection between manual and

automatic rate selection is through the FORCE_PLL_RATE and

FORCE_PLL_RATE_ENABLE bits of the PLL_CONTROL register at address 4Ch. By default

the device is set to automatically search for supported SDI rates.

When set to automatically detect supported data rates, the device repeatedly cycles

through each supported rate that is enabled through the RATE_ENABLE_5G94,

RATE_ENABLE_2G97, RATE_ENABLE_1G485, RATE_ENABLE_270M and

RATE_ENABLE_125M bits of the PLL_CONTROL register, until the device phase locks to

one of the enabled rates. If lock is lost the rate search resumes, continuously testing for

each rate in sequence until lock is regained.

The device reports the current data rate setting of the automatic rate search state

machine through the DETECTED_RATE bits in the PLL_STATUS register at address 4Fh.

Table 4-3 below shows the supported rate that can be detected.

4.3.4 Low/High Bit Rate Detection for Slew Rate Control

A status output named LBR_HBR is provided to control the slew rate selection input of

a downstream SDI cable driver. It can be connected to the SD_EN input of drivers such

as the GS6080 or GS6081 using the Semtech recommended application circuit.

Table 4-3: Automatic Rate Detection - Supported Data Rates

DETECTED_RATE

Data Rate

000

125Mb/s – MADI

001

270Mb/s – SD

010

1.485Gb/s – HD

011

2.97Gb/s – 3G

100

5.94Gb/s – 6G

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