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UT54ACS191E 数据表(PDF) 1 Page - Aeroflex Circuit Technology

部件名 UT54ACS191E
功能描述  Synchronous 4-Bit Up-Down Binary Counters
PDF  12 Pages
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制造商  AEROFLEX [Aeroflex Circuit Technology]
网页  http://www.aeroflex.com
标志 AEROFLEX - Aeroflex Circuit Technology

UT54ACS191E 数据表(HTML) 1 Page - Aeroflex Circuit Technology

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1
36-00-04-001
Ver. 1.0.0
Aeroflex Microelectronics Solutions - HiRel
UT54ACS191E
Synchronous 4-Bit Up-Down Binary Counters
March 2015
www.aeroflex.com/Logic
Datasheet
FEATURES
• Single down/up count control line
• Look-ahead circuitry enhances speed of cascaded counters
• Fully synchronous in count modes
• Asynchronously pre-settable with load control
•0.6μm CRH CMOS process
- Latchup immune
• High speed
• Low power consumption
• Wide power supply operating range of 3.0V to 5.5V
• Available QML Q or V processes
• 16-lead flatpack
• UT54ACS191E - SMD 5962-96564
DESCRIPTION
The UT54ACS191E is a performance and voltage enhanced
version of the UT54ACS191 synchronous 4-bit, reversible up-
down binary counter. Synchronous counting operation is
provided by having all flip-flops clocked simultaneously so that
the outputs change coincident with each other when so
instructed. Synchronous operation eliminates the output
counting spikes associated with asynchronous counters.
The outputs of the four flip-flops are triggered on a low-to-high-
level transition of the clock input if the enable input (CTEN) is
low. A logic one applied to CTEN inhibits counting. The direc-
tion of the count is determined by the level of the down/up (D/
U) input. When D/U is low, the counter counts up and when D/
U is high, it counts down.
The counter features a fully independant clock circuit. Changes
at control inputs (CTEN and D/U) that will modify the operating
mode have no effect on the contents of the counter until clocking
occcurs.
The counter is fully programmable. The outputs may be preset
to either logic level by placing a low on the load input and
entering the desired data at the data inputs. The output will
change to agree with the data inputs independently of the level
of the clock input. The asynchronous load allows counters to
be used as modulo-N dividers by simply modifying the count
length with the preset inputs.
Two outputs have been made available to perform the cascading
function: ripple clock and maximum/minimum (MAX/MIN)
count. The MAX/MIN output produces a high-level output
pulse with a duration approximately equal to one complete cycle
of the clock while the count is zero (all outputs low) counting
down or maximum (15) counting up.
The ripple clock output (RCO) produces a low-level output
pulse under those same conditions but only while the clock input
is low. The counters easily cascade by feeding the RCO to the
enable input of the succeeding counter if parallel clocking is
used, or to the clock input if parallel enabling is used. Use the
MAX/MIN count output to accomplish look-ahead for high-
speed operation.
The device is characterized over full military temperature range
of -55oC to +125oC.
PINOUT
16-Lead Flatpack
TopView
FUNCTION TABLE
FUNCTION
LOAD
CTEN
D/U
CLK
Count Up
H
L
L
-
Count Down
H
L
H
-
Asynchronous
Reset
L
X
X
X
No Change
H
H
X
X
1
2
3
4
5
7
6
16
15
14
13
12
10
11
VDD
89
B
QB
QA
CTEN
D/U
QC
QD
A
CLK
RCO
LOAD
C
VSS
D
MAX/MIN


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