AD9993BBCZ datasheet(43/56 Pages) AD

43 / 56 page

Data Sheet

AD9993

Rev. A | Page 43 of 56

DAC IQ CALIBRATION CONTROL REGISTER

Address: 0x03C, Reset: 0x04, Name: DAC_CAL_IQ_CTRL

Table 38. Bit Descriptions for DAC_CAL_IQ_CTRL

Bits

Bit Name

Description

Reset

Access

DAC_CAL_IQ_START

Starts DAC IQ calibration.

0x0

DAC_CAL_IQ_RESET

Resets DAC IQ calibration.

0x0

PD_DAC_CAL_CLK

0 = DAC IQ calibration clock enabled. Must be 0 to run IQ calibration.

0x1

1 = DAC IQ calibration clock disabled.

DAC_CAL_IQ_SEL

Selects output of IQ calibration. Must be 1 to run IQ calibration.

0x0

DAC_CAL_IQ_EN

Enables DAC I to Q calibration. Must stay high until DAC_CAL_IQ_DONE = 1.

0x0

DAC IQ CALIBRATION STATUS REGISTER

Address: 0x03D, Reset: 0x00, Name: DAC_CAL_IQ_STAT

Table 39. Bit Descriptions for DAC_CAL_IQ_STAT

Bits

Bit Name

Description

Reset

Access

[7:1]

DAC_CAL_IQ_RD

Value of DAC IQ calibration, valid when DAC_CAL_IQ_DONE = 1.

0x0

DAC_CAL_IQ_DONE

Indicates when DAC IQ calibration is done.

0x0

DAC RX FIFO STATUS 1 REGISTER

Address: 0x03F, Reset: 0x55, Name: DAC_FIFO_STS1

Table 40. Bit Descriptions for DAC_FIFO_STS1

Bits

Bit Name

Description

Reset

Access

[7:0]

RXFIFO_THERM

Thermal value of FIFO usage.

0x55

AD9993BBCZ 数据表(PDF) 43 Page - Analog Devices

AD9993BBCZ 数据表(HTML) 43 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

数据表下载

链接网址

AD9993BBCZ 数据表(PDF) 43 Page - Analog Devices

AD9993BBCZ 数据表(HTML) 43 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

数据表 下载

链接网址

数据表下载