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SWCS049I 数据表(PDF) 99 Page - Texas Instruments |
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SWCS049I 数据表(HTML) 99 Page - Texas Instruments |
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99 / 119 page  99 TPS659110, TPS659112, TPS659113 TPS659114, TPS659118, TPS6591133 www.ti.com SWCS049Q – JUNE 2010 – REVISED MARCH 2016 Submit Documentation Feedback Product Folder Links: TPS659110 TPS659112 TPS659113 TPS659114 TPS659118 TPS6591133 Detailed Description Copyright © 2010–2016, Texas Instruments Incorporated Bits Field Name Description Type Reset 0 GPIO_SET Value set on the GPIO output when configured in output mode GPIO assigned to power-up sequence, this bit will be in TURNOFF reset RW 0 Table 6-79. GPIO7_REG Address Offset 0x67 Physical Address Instance (RESET DOMAIN: GENERAL RESET) Description GPIO7 configuration register Type RW 7 6 5 4 3 2 1 0 GPIO_SLEEP Reserved GPIO_DEB GPIO_PDEN GPIO_CFG GPIO_STS GPIO_SET Bits Field Name Description Type Reset 7 GPIO_SLEEP 1: as GPO, force low 0: no impact, keep as in active mode RW 0 6:5 Reserved RO R returns 0s 0x0 4 GPIO_DEB GPIO input debouncing time configuration: When 0, the debouncing is 91.5 µs using a 30.5 µs clock rate When 1, the debouncing is 150 ms using a 50 ms clock rate RW 0 3 GPIO_PDEN GPIO pad pulldown control: 1: Pulldown is enabled 0: Pulldown is disabled GPIO assigned to power-up sequence, this bit will be set to 0 by a TURNOFF reset RW 1 2 GPIO_CFG Configuration of the GPIO pad direction: When 0, the pad is configured as an input When 1, the pad is configured as an output (Default value: See boot configuration) GPIO assigned to power-up sequence, this bit will be set to 1 by a TURNOFF reset RW 0 1 GPIO_STS Status of the GPIO pad RO 1 0 GPIO_SET Value set on the GPIO output when configured in output mode GPIO assigned to power-up sequence, this bit will be in TURNOFF reset RW 0 Table 6-80. GPIO8_REG Address Offset 0x68 Physical Address Instance (RESET DOMAIN: GENERAL RESET) Description GPIO8 configuration register Type RW 7 6 5 4 3 2 1 0 Reserved GPIO_SEL GPIO_DEB GPIO_PDEN GPIO_CFG GPIO_STS GPIO_SET Bits Field Name Description Type Reset 7:6 Reserved RO R returns 0s 0x0 5 GPIO_SEL Select signal to be available at GPIO when configured as output: 0: GPIO_SET 1: PWM out RW 0 |
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