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CTL0196PS-R3 数据表(PDF) 1 Page - CT Micro International Corporation |
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CTL0196PS-R3 数据表(HTML) 1 Page - CT Micro International Corporation |
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1 / 11 page  CT Micro Rev 2 Proprietary & Confidential Page 1 Jun, 2015 CTL0196PS-R3 P-Channel Enhancement MOSFET Package Outline Schematic Features •••• Drain-Source Breakdown Voltage VDSS -60 V •••• Drain-Source On-Resistance RDS(ON) 170m Ω, at VGS= -10V, ID= -1.8A RDS(ON) 200m Ω, at VGS= -4.5V, ID= -1.4A •••• Continuous Drain Current at TC=25 ℃ID = -1.9A •••• Advanced high cell density Trench Technology •••• RoHS Compliance & Halogen Free Description The CTL0196PS-R3 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. Applications •••• Power Management •••• Battery Powered System •••• DC/DC Converter •••• Load Switch •••• DSC •••• LCD Display inverter Gate Source Drain Gate Drain Source |
类似零件编号 - CTL0196PS-R3 |
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类似说明 - CTL0196PS-R3 |
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