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CLC5526PCASM 数据表(PDF) 1 Page - National Semiconductor (TI) |
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CLC5526PCASM 数据表(HTML) 1 Page - National Semiconductor (TI) |
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1 / 10 page ![]() CLC5526 Digital Variable Gain Amplifier (DVGA) General Description The CLC5526 is a high performance, digitally controlled, variable-gain amplifier (DVGA). It has been designed for use in a broad range of mixed signal and digital communication applications such as mobile radio, cellular base stations and back-channel modems where automatic-gain-control (AGC) is required to increase system dynamic range. The CLC5526 has differential input and output, allowing large signal swings on a single 5V rail. The input impedance is 200 Ω. The differential output impedance is 600Ω and is designed to drivea1k Ω differential load. The output ampli- fier has excellent intermodulation performance. The CLC5526 is designed to accept signals from RF elements and maintain a terminated impedance environment. The CLC5526 maintains a 350 MHz bandwidth over its en- tire gain and attenuation range from +30 dB to −12 dB. Inter- nal clamping ensures very fast overdrive recovery. Two tone intermodulation distortion is excellent: at 150 MHz, 1 V pp it is −64 dBc. Input signals to the CLC5526 are scaled by an accurate, dif- ferential R-2R resistive ladder with an input impedance of 200 Ω. A scaled version of the input is selected under digital control and passed to the internal amplifier. The input com- mon mode level is set at 2.4V via a bandgap referenced bias generator which can be overridden by an external input. Following the resistive ladder is a fixed, 30 dB gain amplifier. The output stage common mode voltage of the CLC5526 is set to 3V, by internal, positive supply connected resistors. Digital control of the CLC5526 is accomplished by a 3-bit parallel gain control input and a data valid pin to latch the data. If the data is not latched, the DVGA is transparent to gain control updates. All digital inputs are TTL/CMOS com- patible. A shutdown input reduces the CLC5526 supply currrent to a few mA. During shutdown, the input termination is main- tained and current attenuation settings are held. The CLC5526 operates over the industrial temperature range of −40˚C to +85˚C. The part is available in a 20-pin SSOP package. Features n 350 MHz bandwidth n Differential input and output n Gain control: parallel w/data latching n Supply voltage: +5V n Supply current: 48 mA Key Specifications n Low two tone intermod: distortion: −64 dBc @ 1V PP, 150 MHz 24.5 dBm IP3, 150 MHz n Low noise: 2.5 nV/ √Hz (max gain), 9.3 dB noise figure (max gain) n Wide gain range: +30 dB to −12 dB n Gain step size: 6 dB Applications n Cellular/PCS base stations n IF sampling receivers n Infrared/CCD imaging n Back-channel modems n Electro-optics n Instrumentation n Medical imaging n High definition video Block Diagram DS015016-2 June 1999 © 1999 National Semiconductor Corporation DS015016 www.national.com |
类似零件编号 - CLC5526PCASM |
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类似说明 - CLC5526PCASM |
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