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CLC5526PCASM 数据表(PDF) 2 Page - National Semiconductor (TI) |
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CLC5526PCASM 数据表(HTML) 2 Page - National Semiconductor (TI) |
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2 / 10 page ![]() Pin Configuration Ordering Information CLC5526MSA 20-Pin SSOP CLC5526PCASM Evaluation Board Pin Descriptions Pin Name Pin No. Description GND 1, 5, 8, 10, 11, 13, 20 Circuit ground. Gain MSB 2 Gain Selection Most Significant Bit Gain ISB 3 Gain Selection Data Bit Gain LSB 4 Gain Selection Least Significant Bit In+ 6 Positive Differential Input In− 7 Negative Differential Input Ref Comp 9 Reference Compensation V CC 16, 19 Positive Supply Voltage Shutdown 18 Low Power Standby Control (Active High) Latch Data 17 Data Latch Control (Active High) Out+ 15 Positive Differential Output Out− 14 Negative Differential Output Ref In 12 External Reference Input DS015016-1 www.national.com 2 |
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