Symbol

Pin

Functional Description

Output Pin Descriptions

CODEOUT

10

(17) RLL CODE OUTPUT

This output issues encoded data MSB first to be written to the disk The

control register controls various attributes of this output It can be configured either as a TTL or ECL

compatible output In the TTL mode the sense of the output can be selectively inverted to allow the

active edge to be either the positive or negative transition and can also be put into a high impedance

state (TRI-STATE ) which allows the multiplexing of this pin with another device or pin The

precompensation circuitry can be bypassed The encoder can also be bypassed thus permitting uncoded

test patterns to be issued from this pin

CODEOUT

9

(17) RLL COMPLEMENTARY CODE OUTPUT

This output is the complement of the ECL differential

CODEOUT output pin It issues encoded data to be written to the disk It is enabled as an ECL output by

a control register bit If the TTL mode is selected (by a control register bit) this pin will be in a high

impedance state (TRI-STATE)

EARLY

6

EARLY PRECOMPENSATION OUTPUT

This pin is the early precompensation output It issues a logical

high level to indicate that early precompensation is needed This signal is used by National

Semiconductor Integrated Read Channel Products such as the DP8492 to precompensate the final

coded data before it goes to the readwrite circuit

LATE

7

LATE PRECOMPENSATION OUTPUT

This pin is the late precompensation output It issues a logical

high level to indicate that late precompensation is needed This signal is used by National

Semiconductor Integrated Read Channel Products such as the DP8492 to precompensate the final

coded data before it goes to the readwrite circuit

RRCLK

14

READREFERENCE CLOCK

This output issues read clock to the controller at all times (Note 1) This

signal is used to clock decoded NRZ data into the controller in the read mode (READ CLOCK) and is to

be echoed back to the ENDEC by the controller in the write mode for use as a write clock (REFERENCE

CLOCK) if external write clock mode is selected in the control register

InputOutput Pin Descriptions

NRZIO0

15

LEAST SIGNIFICANT BIT NRZ INPUTOUTPUT

This IO pin represents the Least Significant Bit

(LSB) of NRZ data As an input it accepts the NRZ LSB data signal from the controller Data is strobed

into the ENDEC on the positive-edge of the WRITE CLOCK (if external write clock mode is selected in

the control register) encoded and written to the disk in (17) format This NRZ input must be low while

the preamble and address mark fields are being written This pin is also used to transfer un-encoded test

patterns to the CODEOUT pin As an output it issues the decoded NRZ LSB data to the controller during

a read operation NRZ output data will be clocked into the controller on the positive-edge of the READ

REFERENCE CLOCK (RRCLK)

NRZIO1

16

MOST SIGNIFICANT BIT NRZ INPUTOUTPUT

This IO pin represents the Most Significant Bit (MSB)

of NRZ data As an input it accepts the NRZ MSB data signal from the controller Data is strobed into

the ENDEC on the positive-edge of the WRITE CLOCK (if external write clock mode is selected in the

control register) encoded and written to the disk in (17) format This NRZ input must be held low while

the preamble and address mark fields are being written As an output this pin issues the decoded NRZ

MSB data to the controller during a read operation The decoded NRZ output data will be clocked into

the controller on the positive-edge of the READREFERENCE CLOCK (RRCLK)

Note 1

With the code rate at 15F the effective NRZ data rate is 1F Since this chip employs a 2-bit NRZ interface the write (WCLK) and readreference (RRCLK)

clocks are 05F

3