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DP84902MS 数据表(PDF) 9 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 DP84902MS
功能描述  1,7 Encoder/Decoder Circuit
PDF  16 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

DP84902MS 数据表(HTML) 9 Page - National Semiconductor (TI)

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AC Electrical CharacteristicsRead Mode are guaranteed over operating conditions (see table)
unless otherwise specified
Symbol
Parameter
Min
Typ
Max
Units
Test
(Note 1)
tSU(SYNCDAT)
SYNCDATA Setup Time wrt SYNCCLK
4
1
ns
(Note A)
(negative edge) (see
Figures 6 and 8 )
tH(SYNCDAT)
SYNCDATA Hold Time wrt SYNCCLK
1
0
ns
(Note A)
(negative edge) (see
Figures 6 and 8 )
tSU(NRZIO(01))
NRZIO(01) Setup Time wrt RRCLK
9
19
ns
(Note A)
(positive edge) (see
Figures 6 and 8 )
tH(NRZIO(01))
NRZIO(01) Hold Time wrt RRCLK
9
17
ns
(Note A)
(positive edge) (see
Figures 6 and 8 )
tPD5
Propagation Delay of Decoder SYNCCLK
2
RRCLK
(Note B)
(negative edge) to RRCLK (Note 2) (see
Figures 6 and 7 )
PERIODS
tPW(RRCLK)
RRCLK Pulse Width (High or Low) (see
Figures 6 and 9 )
13
20
ns
(Note A)
Note 1
Typical values are specified at 25 C and 5V supply
Note 2
A RRCLK period is twice the NRZ rate period since a 2-bit interface is used
Note A
This parameter is guaranteed by outgoing testing
Note B
The limit values have been determined by characterization data No outgoing tests are performed
TLF11963 – 6
FIGURE 6 Read Timing Diagram
9



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