LP5521TMSLASHNOPB datasheet(18/48 Pages) TI1

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STANDBY

RESET

INTERNAL

STARTUP

SEQUENCE

C reset=H and EN=H (pin)

POR=H

TSD = H

NORMAL MODE

EN=H (pin) and

CHIP_EN=H (bit)

EN=L (pin) or

CHIP_EN=L (bit)

POR

TSD = L

POWER SAVE

Enter power save

Exit power save

LP5521

SNVS441H – JANUARY 2007 – REVISED MAY 2016

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Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 150°C (typical) and

disengages at TJ = 130°C (typical).

7.4 Device Functional Modes

7.4.1 Modes of Operation

RESET:

In the RESET mode all the internal registers are reset to the default values. Reset is done always if

Reset Register (0DH) is written FFH or internal power on reset (POR) is activated. POR activates

when supply voltage is connected or when the supply voltage VDD falls below 1.5 V typical (0.8 V

minimum). Once VDD rises above 1.5 V, POR inactivates, and the chip continues to the STANDBY

mode. CHIP_EN control bit is low after POR by default.

STANDBY: The STANDBY mode is entered if the register bit CHIP_EN or EN pin is LOW and Reset is not

active. This is the low power consumption mode, when all circuit functions are disabled. Registers

can be written in this mode if EN pin is high. Control bits are effective after start-up.

START-UP: When CHIP_EN bit is written high and EN pin is high, the INTERNAL STARTUP SEQUENCE

powers up all the needed internal blocks (VREF, bias, oscillator, etc.). Start-up delay is after setting

EN pin high is 1 ms (typical). Start-up delay after setting CHIP_EN to 1 is 500

μs (typical). If the

chip temperature rises too high, the thermal shutdown (TSD) disables the chip operation, and the

chip state is in START-UP mode until no TSD event is present.(1)

NORMAL:

During NORMAL mode the user controls the chip using the Control Registers. If EN pin is set low,

the CHIP_EN bit is reset to 0.

POWER SAVE: In POWER SAVE mode analog blocks are disabled to minimize power consumption. See

Automatic Power Save for further information.

Figure 18. Modes of Operation

LP5521TM/NOPB 数据表(PDF) 18 Page - Texas Instruments

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