LP8550TLXSLASHNOPB datasheet(37/49 Pages) TI1

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ISAT >

(VOUT ± VIN)

VOUT

VIN

Where D =

Where IRIPPLE =

(2 x L x f)

DQG'¶= (1 - D)

(VOUT ± VIN)

(VOUT)

+ IRIPPLE

IOUTMAX

'¶

LP8550

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SNVS657E – SEPTEMBER 2010 – REVISED SEPTEMBER 2014

9.2.1.2 Detailed Design Procedure

9.2.1.2.1

Inductor Selection

There are two main considerations when choosing an inductor; the inductor should not saturate, and the inductor

current ripple should be small enough to achieve the desired output voltage ripple. Different saturation current

rating specifications are followed by different manufacturers so attention must be given to details. Saturation

current ratings are typically specified at 25°C. However, ratings at the maximum ambient temperature of

application should be requested from the manufacturer. Shielded inductors radiate less noise and should be

preferred.

The saturation current should be greater than the sum of the maximum load current and the worst case average

to peak inductor current.

Equation 3 below shows the worst case conditions.

•

IRIPPLE: Average to peak inductor current

•

IOUTMAX: Maximum load current

•

VIN: Maximum input voltage in application

•

L: Min inductor value including worst case tolerances

•

f: Minimum switching frequency

•

D: Duty cycle for CCM Operation

•

VOUT: Output voltage

(3)

Example using Equation 3:

•

VIN = 12 V

•

VOUT = 38 V

•

IOUT = 400 mA

•

L = 15

μH − 20% = 12 μH

•

f = 1.25 MHz

•

ISAT = 1.6 A

As a result the inductor should be selected according to the ISAT. A more conservative and recommended

approach is to choose an inductor that has a saturation current rating greater than the maximum current limit of

2.5 A. A 15-

μH inductor with a saturation current rating of 2.5 A is recommended for most applications. The

inductor’s resistance should be less than 300 m

Ω for good efficiency. For high efficiency choose an inductor with

high frequency core material such as ferrite to reduce core losses. To minimize radiated noise, use shielded core

inductor. Inductor should be placed as close to the SW pin and the IC as possible. Special care should be used

when designing the PCB layout to minimize radiated noise and to get good performance from the boost

converter.

9.2.1.2.2

Output Capacitor

A ceramic capacitor with 50-V voltage rating or higher is recommended for the output capacitor. The DC-bias

effect can reduce the effective capacitance by up to 80%, which needs to be considered in capacitance value

selection. For light loads a 4.7-

μF capacitor is sufficient. Effectively the capacitance should be 4 μF for < 150 mA

loads. For maximum output voltage/current 10-

μF capacitor (or two 4.7-μF capacitors) is recommended to

minimize the output ripple.

9.2.1.2.3

LDO Capacitor

A 1

μF ceramic capacitor with 10-V voltage rating is recommended for the LDO capacitor.

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