| 数据搜索系统,热门电子元器件搜索 |
|
MCP2221 数据表(PDF) 33 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
MCP2221 数据表(HTML) 33 Page - Microchip Technology |
|
33 / 80 page ![]() 2015 Microchip Technology Inc. DS20005292B-page 33 MCP2221 TABLE 3-12: SUB-COMMAND STRUCTURE – WRITE CHIP SETTINGS SUB-COMMAND Byte Index Function Description Value Effect 0 0xB1 Write Flash Data – command code 1 0x00 Write Chip Settings – it will write the MCP2221 flash device settings 2 Bit 7: CDC Serial Number Enumeration Enable. 1 The USB serial number will be used during the USB enumeration of the CDC interface. 0 No serial number descriptor will be presented during the USB enumeration. Bit 6: Initial value for LEDUARTRX pin option This value represents the logic level signaled when no UART RX activity takes places. When the UART RX (of the MCP2221) is receiving data, the LEDUARTRX pin will take the negated value of this bit. Bit 5: Initial value for LEDUARTTX pin option This value represents the logic level signaled when no UART TX transmission takes place. When the UART TX (of the MCP2221) is sending data, the LEDUARTTX pin will take the negated value of this bit. Bit 4: Initial value for LEDI2C pin option This value represents the logic level signaled when no I2C traffic occurs. When I2C traffic is active, the LEDI2C pin (if enabled) will take the negated value of this bit. Bit 3: Initial value for SSPND pin option This value represents the logic level signaled when the device is not in Suspend mode. Upon entering Suspend mode, the SSPND pin (if enabled) will take the negated value of this bit. Bit 2: Initial value for USBCFG pin option This value represents the logic level signaled when the device is not USB configured. When the device will be USB-configured, the USBCFG pin (if enabled) will take the negated value of this bit. Bit 1-0: Chip Configuration Security Option 11-10 Permanently locked 01 Password-protected 00 Unsecured 3Bit 7-5 Don’t care Bit 4-0: Clock Output divider value If the GP pin (exposing the clock output) is enabled for clock output operation, the divider value will be used on the 48 MHz USB internal clock and its divided output will be sent to this pin. 4 Bit 7-6: DAC Reference voltage option 11 Reference voltage is 4.096V (only if VDD is above this voltage) 10 Reference voltage is 2.048V 01 Reference voltage is 1.024V 00 Reference voltage is off (this is useful for the case in which the DAC uses other reference than VRM DAC, i.e., VDD) Bit 5: DAC reference option 1 DAC reference is VDD 0 DAC reference is VRM DAC voltage Bit 4-0: Power-Up DAC value |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |