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CAT6243DCADJ-RKG 数据表(PDF) 11 Page - ON Semiconductor |
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CAT6243DCADJ-RKG 数据表(HTML) 11 Page - ON Semiconductor |
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11 / 15 page ![]() CAT6243 www.onsemi.com 11 APPLICATIONS INFORMATION Input Decoupling (CIN) A ceramic or tantalum 1 mF capacitor is recommended and should be connected close to the CAT6243’s package. Higher capacitance and lower ESR will improve the overall line and load transient response. Output Decoupling (COUT) The minimum output decoupling value is 2.2 mF and can be augmented to fulfill stringent load transient requirements. The regulator works with ceramic chip capacitors. Larger values, up to 22 mF, improve noise rejection and load regulation transient response. The CAT6243 is a highly stable regulator and performs well over a wide range capacitor Equivalent Series Resistances (ESR). No−Load Regulation Considerations The CAT6243 adjustable regulator will operate properly under conditions where the only load current is through the resistor divider that sets the output voltage. However, in the case where the CAT6243 is configured to provide a 0.8 V output, there is no resistor divider and the ADJ pin is connected to VOUT. If the part is enabled under no−load conditions, leakage current through the pass transistor at junction temperatures above 85 °C can approach several microamperes, especially as junction temperature approaches 150 °C. If this leakage current is not directed into a load, the output voltage will rise above nominal until a load is applied. For this reason it is recommended that a minimum load of 100 mA be present at all times. Normally the voltage setting resistor divider will serve this function but if no divider is used (VOUT = 0.8 V) then an external load of 8 K W should be provided. Output Voltage Adjust The output voltage can be adjusted from 0.8 V to 5.0 V using resistors between the output and the ADJ input. The output voltage and resistors are chosen using Equation 1 and Equation 2. V OUT + 0.8 1 ) R 1 R 2 ) I ADJ R 1 (eq. 1) R 2 ^ 0.8 V I DIV (eq. 2) R 1 ^ R2 V OUT 0.8 V * 1 (eq. 3) Figure 27. Adjustable Output Resistor Divider VIN ENABLE CAT6243 ADJ VOUT GND VIN VOUT COUT R2 R1 CIN CBYP BYP Input bias current, IADJ, for all practical designs can be ignored (IADJ = 0). Considering that the lowest recommended IOUT value is 100 mA, then, when there is no load on VOUT, IDIV must be 100 mA to keep CAT6243 in regulation. This then sets R2’s value using Equation 2 to 8K W, which minimizes output noise. Use Equation 3 to find the required value for R1. If needed, lower values for IDIV can be considered, but not lower than 10 mA. The price will be worse values for both load regulation and TCOUT. Thermal Considerations As power in the CAT6243 increases, it may become necessary to provide thermal relief. The maximum power dissipation supported by this device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and the ambient temperature affect the rate of junction temperature rise for the part. When the CAT6243 has good thermal conductivity through the PCB, the junction temperature will be relatively low even with high power applications. The maximum dissipation the CAT6243 can handle is given by: P D(MAX) + T J(MAX) * TA RqJA (eq. 4) Since TJ is not recommended to exceed 125 °C, then with CAT6243 soldered to 645 mm2 (1 sq inch), 1 oz copper area, FR4 PCB material can dissipate in excess of 1 W when the ambient temperature (TA) is 25 °C. Note that this assumes the pad in the center of the package is soldered to the dissipating copper foil. See Figure below for RqJA versus PCB area for heat dissipating areas smaller than 645 mm2. Power dissipation can be calculated from the following equations: P D [ VIN(IGND ) IOUT) ) IOUT(VIN * VOUT) (eq. 5) or V IN(MAX) [ P D(MAX) ) (VOUT I OUT) I OUT ) IGND (eq. 6) |
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