CS5505-AS datasheet(10/40 Pages) CIRRUS

10 / 40 page

3.3V SWITCHING CHARACTERISTICS (TA = TMIN to TMAX VA+ = 5V ± 10%; VD+ = 3.3V ±

5%; VA- = -5V

± 10%; Input Levels: Logic 0 = 0V, Logic 1 = VD+; CL = 50 pF.) (Note 2)

Parameter

Symbol

Min

Typ

Max

Units

SSC Mode (M/SLP = VD+)

Access Time:

CS Low to SDATA out (DRDY = low)

DRDY falling to MSB (CS = low)

tcsd1

tdfd

2/fclk

3/fclk

SDATA Delay Time:

SCLK falling to next SDATA bit

tdd1

265

400

SCLK Delay Time

SDATA MSB bit to SCLK rising

tcd1

-1/fclk

-ns

Serial Clock (Out)

Pulse Width High

Pulse Width Low

tph1

tpl1

1/fclk

Output Float Delay:

CS high to output Hi-Z (Note 16)

SCLK rising to SDATA Hi-Z

tfd1

tfd2

1/fclk

2/fclk

SEC Mode (M/SLP = DGND)

Serial Clock (In)

fsclk

1.25

MHz

Serial Clock (In)

Pulse Width High

Pulse Width Low

tph2

tpl2

200

Access Time:

CS Low to data valid (Note 17)

tcsd2

100

200

Maximum Delay time:

(Note 18)

SCLK falling to new SDATA bit

tdd2

400

600

Output Float Delay:

CS high to output Hi-Z (Note 16)

SCLK falling to SDATA Hi-Z

tfd3

tfd4

320

150

500

CS5505/6/7/8

DS59F4

CS5505/6/7/8

DS59F5

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