Philips Semiconductors

Product data sheet

GTL2002

2-bit bi-directional low voltage translator

2004 Sep 29

3

PIN CONFIGURATION

1

2

3

4

5

6

7

8

GND

SA00640

Figure 1. SO8 and TSSOP8 pinning

1

2

3

4

5

6

7

8

GND

SA00658

Figure 2. VSSOP8 pinning

PIN DESCRIPTION

PIN NUMBER

SO8 and

TSSOP8

VSSOP8

SYMBOL

NAME AND FUNCTION

1

4

GND

Ground (0 V)

2

1

Source of reference transistor

3, 4

2, 3

5, 6

5, 6

7

7

Drain of reference transistor

8

8

Gate of reference transistor

FUNCTION TABLE

HIGH-to-LOW translation assuming Dn is at the higher voltage level

In-Dn

Out-Sn

Transistor

H

H

0 V

X

X

Off

H

H

H

On

H

H

L

On

L

L

X

X

Off

H = HIGH voltage level

L

= LOW voltage level

X = Don’t Care

NOTES:

1. Sn is not pulled up or pulled down.

2. Sn follows the Dn input LOW.

translator operation.

FUNCTION TABLE

LOW-to-HIGH translation assuming Dn is at the higher voltage level

In-Sn

Out-Dn

Transistor

H

H

0 V

X

X

Off

H

H

nearly off

H

H

L

On

L

L

X

X

Off

H = HIGH voltage level

L

= LOW voltage level

X = Don’t Care

NOTES:

2. Dn follows the Sn input LOW.

translator operation.

CLAMP SCHEMATIC

SA00645

S1

S2

D1

D2

Figure 3. Clamp schematic