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PIFE32251B-R68MS 数据表(PDF) 89 Page - Texas Instruments |
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PIFE32251B-R68MS 数据表(HTML) 89 Page - Texas Instruments |
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89 / 157 page ![]() 89 TPS650830 www.ti.com SLVSCF4A – DECEMBER 2014 – REVISED JULY 2016 Submit Documentation Feedback Product Folder Links: TPS650830 Detailed Description Copyright © 2014–2016, Texas Instruments Incorporated 6.6.1.18 PGMASK2 Register (address = 0x19) [reset = 00000000] Figure 6-40. PGMASK2 Register Format B7 B6 B5 B4 B3 B2 B1 B0 RESERVED_P GMASK2[3] RESERVED_P GMASK2[2] RESERVED_P GMASK2[1] RESERVED_P GMASK2[0] V18U25UPG MV12UPG MV33SPG MV18SPG 0 0 0 0 0 0 0 0 R R R R RW RW RW RW LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 6-21. PGMASK2 Register Field Descriptions Bit Field Type Reset Description 7:4 RESERVED_PGMASK2[3:0] R 0000 3 V18U25UPG RW 0 V1.8_2.5U PG is part of the power good tree 0: Power Good function is enabled 1: Power Good function is masked and set to 1 (not part of the Power Good tree) 2 MV12UPG RW 0 V1.2U PG is part of the power good tree 0: Power Good function is enabled 1: Power Good function is masked and set to 1 (not part of the Power Good tree) 1 MV33SPG RW 0 V3.3S PG is part of the power good tree 0: Power Good function is enabled 1: Power Good function is masked and set to 1 (not part of the Power Good tree) 0 MV18SPG RW 0 V1.8S PG is part of the power good tree 0: Power Good function is enabled 1: Power Good function is masked and set to 1 (not part of the Power Good tree) |
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