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PC87382 数据表(PDF) 13 Page - National Semiconductor (TI) |
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PC87382 数据表(HTML) 13 Page - National Semiconductor (TI) |
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13 / 72 page ![]() 1.0 Signal/Pin Connection and Description (Continued) Revision 1.2 13 www.national.com 1.4 INTERNAL PULL-UP AND PULL-DOWN RESISTORS The signals listed in Table 2 can optionally support internal pull-up (PU) and/or pull-down (PD) resistors. See Section 8.3 on page 62 for the values of each resistor type. Table 2. Internal Pull-Up and Pull-Down Resistors Signal Pin(s) Type Comments General-Purpose Input/Output (GPIO) Ports GPIO00-04 11, 12,13, 14, 15 PU30 Programmable GPIO21 21 PU80 Programmable GPIO20, GPIO23 17, 22 PU30 Programmable Strap Configuration and Testability BADDR 2 PU30 Strap1 1. Active only during VDD Power-Up reset. TEST 48 PU30 Strap1 TRIS 47 PU30 Strap1 Docking LPC DLAD3-0 33, 37, 39, 41 PU30 Active when the switch is off2 2. The Docking LPC signal resistors are active when the corresponding switch is off. DLCLK 26 PU30 Active when the switch is off2 DCLKOUT 42 PU80 Active when the switch is off2 DLFRAME 31 PU30 Active when the switch is off2 DLRESET 18 PD120 Active when the switch is off2 DSERIRQ 29 PU30 Active when the switch is off2 DCLKRUN 20 PU30 Active when the switch is off2 DLDRQ 4 PU30 |
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