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STV82X6 数据表(PDF) 29 Page - STMicroelectronics |
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STV82X6 数据表(HTML) 29 Page - STMicroelectronics |
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29 / 95 page ![]() 29/95 STV82x6 I²C Bus 8I²C Bus 8.1 I²C Address and Protocol The STV82x6 I²C interface works in Slave mode and is fully compliant with I²C standards in Fast mode (maximum frequency of 400 kHz). Two pairs of I²C chip addresses are used to connect two STV82x6 chips to the same I²C serial bus. The device address pairs are defined by the polarity of the ADR pin and are listed in the following table: Protocol Description ● Write Protocol ● Read Protocol ● W = Write address, ● R = Read address, ● A = Acknowledge, ● N = No acknowledge. ● Sub-address is the register address pointer; this value auto-increments for both write and read. The STV82x6 cannot immediately reply to an I²C read request when addressing DSP registers (addresses 40h and greater).The I²C interface holds the I²C Serial Clock (SCL) line low before each data byte is read to compensate for the latency of the DSP response (64 µs in worst case). The implemented I²C Pulling Down mode is compatible with a Continuous or Stopped SCL when held low (restart at high level, if stopped) and operates between 24 kHz and 400 kHz. If SCL Pulling Down mode is not supported by the Master I²C interface, the Pulling Down system can be de- activated by setting the SCLPD_OFF bit in register RESET. In this case, two successive reads of the same DSP register are required and only the second one is valid (first read is ‘don’t care’). This special protocol is no longer compatible with the I²C sub-address auto-incrementation function in Read mode. 8.2 STV82x6 Reset All STV82x6 features are controlled via the I²C bus. However, the device is designed to power up into a fully working default mode without having to be sent I²C bus data to set it up. The STV82x6 can be "reset" in 2 ways: 1. By Software via the I²C bus: This clears all synchronous logic, except for the I²C bus registers. 2. By Hardware via the RESET pin: In addition to clearing all synchronous logic, the RESET input (active low) resets all the I²C bus registers to the default values listed below. Table 8: I²C Read/Write Addresses ADR Write address (hex) (W) Read address (hex) (R) LOW (connected to GND1) 80h 81h HIGH (connected to VDD1) A0h A1h Start W A Sub-address A Data A .... A Data A Stop Start W A Sub-address A Stop Start R A Data A .... A Data N |
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