21/27

L6712A L6712

Figure 14. ACM Control Loop Gain Block Diagram (left) and Bode Diagram (right).

The ACM control loop gain is designed to obtain a high DC gain to minimize static error and cross the 0dB

axes with a constant -20dB/dec slope with the desired crossover frequency

ZF(s), the transfer function has one zero and two poles. Both the poles are fixed once the output filter is

designed and the zero is fixed by ESR and the Droop resistance.

at

while placing the zero in correspondence with the L-C resonance a simple -20dB/dec shape of the gain is

assured (See Figure 14). In fact, considering the usual value for the output filter, the LC resonance results

to be at frequency lower than the above reported zero.Compensation network can be simply designed

placing

Voltage Mode (VM) Control Loop (DROOP = SGND)

Disconnecting the DROOP pin from the Control Loop, the system topology becomes a Voltage Mode. The

simplest way to compensate this loop still keeping the same compensation network consists in placing the

RF-CF zero in correspondence with the L-C filter resonance.

The loop gain becomes now:

G

()

4

5

---

V

IN

OSC

-------------------

Z

()

R

FB

---------------

1s Co

R

DROO P

RA_Gain

-------------------------

ESR

+





⋅

⋅

+

s

2

Co

L

2

---

s

L

2Ro

⋅

---------------

Co ESR

Co

L

2Ro

⋅

---------------

⋅

+

⋅

+

1

+

⋅

+

⋅

⋅

⋅⋅

⋅

⋅

–

=

Rout

Cout

ESR

L/2

VID

PWM

d

FB

DROOP

COMP

RA_Gain

dB

ω

K

dB

FB

OSC

IN

R

1

∆V

V

5

4

K













⋅

⋅

=

R

F

R

⋅

V

IN

-----------------------------------

5

4

---

ω

T

L

2

R

DROOP

RA_Gain

-------------------------

ESR

+





⋅

----------------------------------------------------------

C

F

Co

L

2

---

⋅

R

F

--------------------

=

⋅⋅

⋅

=

G

()

V

IN

V

OSC

∆

-------------------

Z

()

R

FB

---------------

Z

()

Z

()

+

⋅⋅

⋅

–

=