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OMAP3530ECUS 数据表(PDF) 63 Page - Texas Instruments

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部件名 OMAP3530ECUS
功能描述  OMAP3530 and OMAP3525 Applications Processors
PDF  265 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

OMAP3530ECUS 数据表(HTML) 63 Page - Texas Instruments

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OMAP3530, OMAP3525
www.ti.com
SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013
Table 2-2. Ball Characteristics (CBC Pkg.)(1) (continued)
BALL
BALL
BUFFER
PULLUP
BALL
BALL TOP
PIN NAME
RESET REL.
MODE [4]
TYPE [5]
RESET
RESET REL.
POWER [9]
HYS [10]
STRENG TH
/DOWN
IO CELL [13]
BOTTOM [1]
[2]
[3]
MODE [8]
STATE [6]
STATE [7]
(mA) [11]
TYPE [12]
T8
NA
mcspi1_cs3
0
O
H
H
7
vdds
Yes
4
(18)
PU100/
LVCMOS
PD100
hsusb2_tll_d
2
IO
ata2
hsusb2_data
3
IO
2
gpio_177
4
IO
mm2_txdat
5
IO
safe_mode
7
-
V9
NA
mcspi2_cs1
0
O
L
L
7
vdds
Yes
4
(18)
PU100/
LVCMOS
PD100
gpt8_pwm_e
1
IO
vt
hsusb2_tll_d
2
IO
ata3
hsusb2_data
3
IO
3
gpio_182
4
IO
mm2_txen_n
5
IO
safe_mode
7
-
T19
NA
mcbsp_clks
0
I
L
L
7
vdds
Yes
4
(19)
PU100/
LVCMOS
PD100
cam_shutter
2
O
gpio_160
4
IO
uart1_cts
5
I
safe_mode
7
-
AB2
NA
etk_clk
0
O
H
H
4
vdds
Yes
4
(19)
PU100/
LVCMOS
PD100
mcbsp5_clkx
1
IO
mmc3_clk
2
O
hsusb1_stp
3
O
gpio_12
4
IO
mm1_rxdp
5
IO
hsusb1_tll_st
6
I
p
hw_dbg0
7
O
AB3
NA
etk_ctl
0
O
H
H
4
vdds
Yes
4
(19)
PU100/
LVCMOS
PD100
mmc3_cmd
2
IO
hsusb1_clk
3
O
gpio_13
4
IO
hsusb1_tll_cl
6
O
k
hw_dbg1
7
O
AC3
NA
etk_d0
0
O
H
H
4
vdds
Yes
4
(19)
PU100/
LVCMOS
PD100
mcspi3_simo
1
IO
mmc3_dat4
2
IO
hsusb1_data
3
IO
0
gpio_14
4
IO
mm1_rxrcv
5
IO
hsusb1_tll_d
6
IO
ata0
hw_dbg2
7
O
AD4
NA
etk_d1
0
O
H
H
4
vdds
Yes
4
(19)
PU100/
LVCMOS
PD100
mcspi3_somi
1
IO
(18) The capacity load range is [2 pf to 6 pF].
(19) The capacity load range is [2 pf to 6 pF].
Copyright © 2008–2013, Texas Instruments Incorporated
TERMINAL DESCRIPTION
63
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Product Folder Links: OMAP3530 OMAP3525



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