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OMAP3530ECUS 数据表(PDF) 67 Page - Texas Instruments

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部件名 OMAP3530ECUS
功能描述  OMAP3530 and OMAP3525 Applications Processors
PDF  265 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

OMAP3530ECUS 数据表(HTML) 67 Page - Texas Instruments

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OMAP3530, OMAP3525
www.ti.com
SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013
Table 2-2. Ball Characteristics (CBC Pkg.)(1) (continued)
BALL
BALL
BUFFER
PULLUP
BALL
BALL TOP
PIN NAME
RESET REL.
MODE [4]
TYPE [5]
RESET
RESET REL.
POWER [9]
HYS [10]
STRENG TH
/DOWN
IO CELL [13]
BOTTOM [1]
[2]
[3]
MODE [8]
STATE [6]
STATE [7]
(mA) [11]
TYPE [12]
safe_mode
7
-
U4
NA
mcbsp4_dr
0
I
L
L
7
vdds
Yes
4
(22)
PU100/
LVCMOS
PD100
gpio_153
4
IO
hsusb3_tll_d
5
IO
ata0
mm3_rxrcv
6
IO
safe_mode
7
-
R3
NA
mcbsp4_dx
0
IO
L
L
7
vdds
Yes
4
(22)
PU100/
LVCMOS
PD100
gpio_154
4
IO
hsusb3_tll_d
5
IO
ata2
mm3_txdat
6
IO
safe_mode
7
-
T3
NA
mcbsp4_fsx
0
IO
L
L
7
vdds
Yes
4
(22)
PU100/
LVCMOS
PD100
gpio_155
4
IO
hsusb3_tll_d
5
IO
ata3
mm3_txen_n
6
IO
safe_mode
7
-
M3
NA
mmc2_dat5
0
IO
L
L
7
vdds
Yes
4
(23)
PU100/
LVCMOS
PD100
mmc2_dir_da
1
O
t1
cam_global_r
2
IO
eset
mmc3_dat1
3
IO
gpio_137
4
IO
hsusb3_tll_st
5
I
p
mm3_rxdp
6
IO
safe_mode
7
-
L3
NA
mmc2_dat6
0
IO
L
L
7
vdds
Yes
4
(23)
PU100/
LVCMOS
PD100
mmc2_dir_c
1
O
md
cam_shutter
2
O
mmc3_dat2
3
IO
gpio_138
4
IO
hsusb3_tll_di
5
O
r
safe_mode
7
-
K3
NA
mmc2_dat7
0
IO
L
L
7
vdds
Yes
4
(23)
PU100/
LVCMOS
PD100
mmc2_clkin
1
I
mmc3_dat3
3
IO
gpio_139
4
IO
hsusb3_tll_n
5
IO
xt
mm3_rxdm
6
IO
safe_mode
7
-
W2
NA
uart1_cts
0
I
L
L
7
vdds
Yes
4
(23)
PU100/
LVCMOS
PD100
gpio_150
4
IO
hsusb3_tll_cl
5
O
k
safe_mode
7
-
(23) The capacity load range is [2 pf to 6 pF].
Copyright © 2008–2013, Texas Instruments Incorporated
TERMINAL DESCRIPTION
67
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Product Folder Links: OMAP3530 OMAP3525



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