OMAP3530ECUS datasheet(136/265 Pages) TI1

136 / 265 page

ESR=R

OMAP3530, OMAP3525

SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013

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linear operating region; thus oscillation begins when power is applied.

(4) Cf1 and Cf2 represent the total capacitance of the PCB and components excluding the power IC and crystal. Their values in fact depend

on the crystal datasheet. In the datasheet of the crystal, the frequency is specified at a specific load capacitor value which is the

equivalent capacitor of the two capacitors Cf1 and Cf2 connected to sys_xtalin and sys_xtalout. The frequency of the oscillations

depends on the value of the capacitors (10 pF corresponds to a load capacitor of 5 pF for the crystal).

The crystal must be in the fundamental mode of operation and parallel resonant. Table 4-2 summarizes

the required electrical constraints.

Table 4-2. Crystal Electrical Characteristics

NAME

DESCRIPTION

MIN

TYP

MAX

UNIT

Parallel resonance crystal frequency(1)

12, 13, 16.8, or 19.2

MHz

Load capacitance for crystal parallel resonance

ESR12&13

Crystal ESR (12 and 13 MHz)(1)

Ω

ESR16.8&19.2

Crystal ESR (16.8 and 19.2 MHz)(2)

Ω

Crystal shunt capacitance

Crystal motional inductance for fp = 12 MHz

Crystal motional capacitance

100

Crystal drive level

0.5

Rbias

Internal bias resistor

120

300

Ω

(1)

Measured with the load capacitance specified by the crystal manufacturer. This load is defined by the foot capacitances tied in series. If

CL = 20 pF, then both foot capacitors will be Cf1 = Cf2 = 40 pF. Parasitic capacitance from package and board must also be taken in

account.

(2)

Measured with the load capacitance specified by the crystal manufacturer. This load is defined by the foot capacitances tied in series. If

CL = 20 pF, then both foot capacitors will be Cf1 = Cf2 = 40 pF. Parasitic capacitance from package and board must also be taken in

account.

When selecting a crystal, the system design must take into account the temperature and aging

characteristics of a crystal versus the user environment and expected lifetime of the system. Table 4-3

details the switching characteristics of the oscillator and the input requirements of the 12-, 13-, 16.8-, or

19.2-MHz input clock.

Table 4-3. Base Oscillator Switching Characteristics

NAME

DESCRIPTION

MIN

TYP

MAX

UNIT

Oscillation frequency

12, 13, 16.8, or 19.2

MHz

tsX

Start-up time(1) (2)

(1)

Start-up time defined as time interval between oscillator control signal release and sys_xtalin amplitude at 50% of its final value (vdd and

vdds supplies ramped and stable). The start-up time can be performed in function of the crystal characteristics. 8-ms minimum only

when using the internal oscillator; it is programmable after reset for wake-up. At power-on reset, the time is adjustable using the pin

itself. The reset must be released when the oscillator or clock source is stable. Before the processor boots up and the oscillator is set to

bypass mode, there is a start-up time when the internal oscillator is in application mode and receives a square wave. The start-up time

in this case is about 100

μs.

(2)

For fp = 12 or 13 MHz: CL = 13.5 pF and Lm = 35 mH

For fp = 16.8 or 19.2 MHz: CL = 9 pF and Lm = 15 mH

4.1.3

Clock Squarer Input Description

A 1.8-V CMOS clock squarer is another source that can supply a 12-, 13-, 16.8-, 19.2-, 26-, or 38.4-MHz

clock to the OMAP3530/25. An analog clock squarer function converts a low-amplitude sinusoidal clock

into a low-jitter digital signal. It can be connected to input pin sys_xtalin (sys_xtalout unconnected).

Figure 4-3 illustrates the effective connections.

136

CLOCK SPECIFICATIONS

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