数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ADP5070AREZ-R7 数据表(PDF) 4 Page - Analog Devices

部件名 ADP5070AREZ-R7
功能描述  Independent Positive and Negative Outputs
PDF  28 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP5070AREZ-R7 数据表(HTML) 4 Page - Analog Devices

  ADP5070AREZ-R7 Datasheet HTML 1Page - Analog Devices ADP5070AREZ-R7 Datasheet HTML 2Page - Analog Devices ADP5070AREZ-R7 Datasheet HTML 3Page - Analog Devices ADP5070AREZ-R7 Datasheet HTML 4Page - Analog Devices ADP5070AREZ-R7 Datasheet HTML 5Page - Analog Devices ADP5070AREZ-R7 Datasheet HTML 6Page - Analog Devices ADP5070AREZ-R7 Datasheet HTML 7Page - Analog Devices ADP5070AREZ-R7 Datasheet HTML 8Page - Analog Devices ADP5070AREZ-R7 Datasheet HTML 9Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 28 page
background image
Data Sheet
ADP5070
Rev. A | Page 3 of 27
SPECIFICATIONS
PVIN1 = PVIN2 = PVINSYS = 2.85 V to 15 V, VPOS = 15 V, VNEG = −15 V, fSW = 1200 kHz, TJ = −40°C to +125°C for minimum/maximum
specifications, and TA = 25°C for typical specifications, unless otherwise noted.
Table 2.
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
INPUT SUPPLY VOLTAGE RANGE
VIN
2.85
15
V
PVIN1, PVIN2, PVINSYS
QUIESCENT CURRENT
Operating Quiescent Current
PVIN1, PVIN2, PVINSYS (Total)
IQ
3.5
4.0
mA
No switching, EN1 = EN2 = high,
PVIN1 = PVIN2 = PVINSYS = 5 V
Shutdown Current
ISHDN
5
10
µA
No switching, EN1 = EN2 = low, PVIN1 =
PVIN2 = PVINSYS = 5 V
UVLO
System UVLO Threshold
PVINSYS
Rising
VUVLO_RISING
2.8
2.85
V
Falling
VUVLO_FALLING
2.5
2.55
V
Hysteresis
VHYS_1
0.25
V
OSCILLATOR CIRCUIT
Switching Frequency
fSW
1.130
1.200
1.270
MHz
SYNC/FREQ = low
2.240
2.400
2.560
MHz
SYNC/FREQ = high (connect to VREG)
SYNC/FREQ Input
Input Clock Range
fSYNC
1.000
2.600
MHz
Input Clock Minimum On Pulse Width
tSYNC_MIN_ON
100
ns
Input Clock Minimum Off Pulse Width
tSYNC_MIN_OFF
100
ns
Input Clock High Logic
VH (SYNC)
1.3
V
Input Clock Low Logic
VL (SYNC)
0.4
V
PRECISION ENABLING (EN1, EN2)
High Level Threshold
VTH_H
1.125
1.15
1.175
V
Low Level Threshold
VTH_L
1.025
1.05
1.075
V
Shutdown Mode
VTH_S
0.4
V
Internal circuitry disabled to achieve
ISHDN
Pull-Down Resistance
REN
1.48
INTERNAL REGULATOR
VREG Output Voltage
VREG
4.25
V
BOOST REGULATOR
Feedback Voltage
VFB1
0.8
V
Feedback Voltage Accuracy
−0.5
+0.5
%
TJ = 25°C
−1.5
+1.5
%
TJ = −40°C to +125°C
Feedback Bias Current
IFB1
0.1
µA
Overvoltage Protection Threshold
VOV1
0.86
V
At FB1 pin
Load Regulation
∆VFB1/ILOAD1
0.0003
%/mA
ILOAD11 = 5 mA to 150 mA
Line Regulation
∆VFB1/VPVIN1
0.002
%/V
VPVIN1 = 2.85 V to 14.5 V, ILOAD11 = 15 mA
Error Amplifier (EA) Transconductance
gM1
270
300
330
µA/V
Power FET On Resistance
RDS (ON) BOOST
175
Power FET Maximum Drain Source
Voltage
VDS (MAX) BOOST
39
V
Input Disconnect Switch On Resistance
RDS (ON) INBK
210
Current-Limit Threshold
ILIM (BOOST)
1.00
1.10
1.20
A
Minimum On Time
50
ns
Minimum Off Time
25
ns



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com