数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

VDP313XY 数据表(PDF) 39 Page - Micronas

部件名 VDP313XY
功能描述  Video Processor Family
PDF  76 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  MICRONAS [Micronas]
网页  http://www.micronas.com
标志 MICRONAS - Micronas

VDP313XY 数据表(HTML) 39 Page - Micronas

Back Button VDP313XY Datasheet HTML 35Page - Micronas VDP313XY Datasheet HTML 36Page - Micronas VDP313XY Datasheet HTML 37Page - Micronas VDP313XY Datasheet HTML 38Page - Micronas VDP313XY Datasheet HTML 39Page - Micronas VDP313XY Datasheet HTML 40Page - Micronas VDP313XY Datasheet HTML 41Page - Micronas VDP313XY Datasheet HTML 42Page - Micronas VDP313XY Datasheet HTML 43Page - Micronas Next Button
Zoom Inzoom in Zoom Outzoom out
 39 / 76 page
background image
ADVANCE INFORMATION
VDP 313xY
Micronas
39
Analog RGB Insertion
4B
9
w v
bit[7]
0/1
disable/enable analog fast blank
input for RGB inserion
0ERGB
4B
9
w v
bit[0]
0
Picture frame overOSD
1
OSD over picture frame
0
OSDPRIO
32
8
w/r
fast blank interface mode
bit[0]
0
internal fast blank 1 from FBLIN1
pin
1
force internal fast blank 1 signal
to high
bit[1]
0/1
internal fast blank active high/low
bit[2]
0/1
disable/enable clamping
reference for RGB outputs
bit[3]
1
full line MADC measurement
window, disables bit [3] in
address 25
bit[4]
0/1
horizontal flyback input active
high/low
bit[6:5]
reserved (set to 0)
bit[7]
0
internal fast blank 1 from FBLIN1
pin
1
force internal fast blank 1 signal
to low
0FBMOD
FBFOH1
FBPOL
CLMPR
FLMW
FLPOL
FBFOL1
31
8
w/r
fast blank interface mode 2
bit[0]
0
internal fast blank 2 from FBLIN2
pin
1
force internal fast blank 2 signal
to high
bit[1]
0
internal fast blank 2 from FBLIN2
pin
1
force internal fast blank 2signal to
low
bit[2]
fast blank input priority
0
FBLIN1>FBLIN2
1
FBLIN2>FBLIN1
bit[3]
fast blank monitor input select
0
monitor connected to FBLIN1 pin
1
monitor connected to FBLIN2 pin
bit[4]
half contrast switch enable
0/1
HCS disable/enable
bit[5]
0
half contrast from HCS pin
1
force half contrast signal to high
bit[6]
0/1
half contrast active high/low at
HCS pin
bit[7]
reserved (set to 0)
0FBMOD2
FBFOH2
FBFOL2
FBPRIO
FBMON
HCSEN
HCSFOH
HCSPOL
Table 2–5: I2C control and status registers of the video backend
(Registers are set to ’0’ at reset, default values are recommendations)
I2C Sub
address
Number
of bits
Mode
Function
Default
Name
(hex)
(hex)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com