UCS81003 datasheet(32/108 Pages) MICROCHIP

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UCS81003

DS20005334A-page 32

 2014 Microchip Technology Inc.

6.0

USB HIGH-SPEED DATA

SWITCH

The UCS81003 contains a series USB 2.0-compliant

high-speed switch between the DPIN and DMIN pins and

between the DPOUT and DMOUT pins. This switch is

designed for high-speed, low-latency functionality to

allow

USB

2.0

full-speed

and

high-speed

communications with minimal interference.

Nominally, the switch is closed in the Active state,

allowing uninterrupted USB communications between

the upstream host and the portable device. The switch

is opened when:

• The UCS81003 is actively emulating using any of

the charger emulation profiles except CDP (by

default - see Section 10.4.5 “High-Speed

Switch Configuration Register”)

• The UCS81003 is operating as a dedicated

charger unless the HSW_DCE configuration bit is

set (see Section 10.4.5 “High-Speed Switch

Configuration Register”)

• The UCS81003 is in the Detect state (by default)

or in the Sleep state

6.1

USB-IF High-Speed Compliance

The USB data switch will not significantly degrade the

signal integrity through the device DP/DM pins with

USB high-speed communications.

Note:

If the VDD voltage is less than VDD_TH, the

high-speed data switch will be disabled

and opened.

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