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TMP05 数据表(PDF) 17 Page - Analog Devices

部件名 TMP05
功能描述  짹0.5째C Accurate PWM Temperature Sensor in 5-Lead SC-70
PDF  28 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

TMP05 数据表(HTML) 17 Page - Analog Devices

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TMP05/TMP06
Rev. 0 | Page 17 of 28
APPLICATION HINTS
THERMAL RESPONSE TIME
The time required for a temperature sensor to settle to a
specified accuracy is a function of the thermal mass of the
sensor and the thermal conductivity between the sensor and the
object being sensed. Thermal mass is often considered
equivalent to capacitance. Thermal conductivity is commonly
specified using the symbol Q, and can be thought of as thermal
resistance. It is commonly specified in units of degrees per watt
of power transferred across the thermal joint. Thus, the time
required for the TMP05/TMP06 to settle to the desired
accuracy is dependent on the package selected, the thermal
contact established in that particular application, and the
equivalent power of the heat source. In most applications, the
settling time is probably best determined empirically.
SELF-HEATING EFFECTS
The temperature measurement accuracy of the TMP05/TMP06
might be degraded in some applications due to self-heating.
Errors introduced are from the quiescent dissipation and power
dissipated when converting, that is, during TL. The magnitude of
these temperature errors is dependent on the thermal conduc-
tivity of the TMP05/TMP06 package, the mounting technique,
and the effects of airflow. Static dissipation in the TMP05/
TMP06 is typically 10 W operating at 3.3 V with no load. In the
5-lead SC-70 package mounted in free air, this accounts for a
temperature increase due to self-heating of
ΔT = PDISS × θJA = 10 µW × 211.4°C/W = 0.0021°C
(5)
In addition, power is dissipated by the digital output, which is
capable of sinking 800 µA continuously (TMP05). Under an
800 µA load, the output can dissipate
PDISS = (0.4 V)(0.8 mA)((TL)/TH + TL))
(6)
For example, with TL = 80 ms and TH = 40 ms, the power
dissipation due to the digital output is approximately 0.21 mW.
In a free-standing SC-70 package, this accounts for a tempera-
ture increase due to self-heating of
ΔT = PDISS × θJA = 0.21 mW × 211.4°C/W = 0.044°C (7)
This temperature increase adds directly to that from the
quiescent dissipation and affects the accuracy of the TMP05/
TMP06 relative to the true ambient temperature.
It is recommended that current dissipated through the device be
kept to a minimum, because it has a proportional effect on the
temperature error.
SUPPLY DECOUPLING
The TMP05/TMP06 should be decoupled with a 0.1 µF ceramic
capacitor between VDD and GND. This is particularly important,
if the TMP05/TMP06 are mounted remotely from the power
supply. Precision analog products such as the TMP05/TMP06
require a well-filtered power source. Because the TMP05/
TMP06 operate from a single supply, it might seem convenient
to simply tap into the digital logic power supply. Unfortunately,
the logic supply is often a switch-mode design, which generates
noise in the 20 kHz to 1 MHz range. In addition, fast logic gates
can generate glitches hundreds of mV in amplitude due to
wiring resistance and inductance.
If possible, the TMP05/TMP06 should be powered directly
from the system power supply. This arrangement, shown in
Figure 31, isolates the analog section from the logic switching
transients. Even if a separate power supply trace is not available,
however, generous supply bypassing reduces supply-line-
induced errors. Local supply bypassing consisting of a 0.1 µF
ceramic capacitor is critical for the temperature accuracy
specifications to be achieved. This decoupling capacitor must
be placed as close as possible to the TMP05/TMP06’s VDD pin.
A recommended decoupling capacitor is Phicomp’s 100 nF,
50 V X74.
Keep the capacitor package size as small as possible, because
ESL (equivalent series inductance) increases with increasing
package size. Reducing the capacitive value below 100 nF
increases the ESR (equivalent series resistance). Use of a
capacitor with an ESL of 1 nH and an ESR of 80 mΩ is
recommended.
0.1
µF
TMP05/
TMP06
TTL/CMOS
LOGIC
CIRCUITS
POWER
SUPPLY
Figure 31. Use Separate Traces to Reduce Power Supply Noise



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