LSM6DS3US datasheet(49/104 Pages) STMICROELECTRONICS

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LSM6DS3US

104

9.4

FIFO_CTRL2 (07h)

FIFO control register (r/w).

Table 24. FIFO_CTRL2 register description

9.5

FIFO_CTRL3 (08h)

FIFO control register (r/w).

Table 26. FIFO_CTRL3 register description

Table 23. FIFO_CTRL2 register

TIMER_PEDO

_FIFO_EN

TIMER_PEDO

_FIFO_DRDY

0(1)

1. This bit must be set to ‘0’ for the correct operation of the device.

0(1)

FTH_11

FTH10

FTH_9

FTH_8

TIMER_PEDO

_FIFO_EN

Enable pedometer step counter and timestamp as 4th FIFO data set. Default: 0

(0: disable step counter and timestamp data as 4th FIFO data set;

1: enable step counter and timestamp data as 4th FIFO data set)

TIMER_PEDO

_FIFO_DRDY

FIFO write mode(1). Default: 0

(0: enable write in FIFO based on XL/Gyro data-ready;

1: enable write in FIFO at every step detected by step counter.)

1. This bit is effective if the DATA_VALID_SEL_FIFO bit of the MASTER_CONFIG (1Ah) register is set to 0.

FTH_[11:8]

FIFO threshold level setting(2). Default value: 0000

Watermark flag rises when the number of bytes written to FIFO after the next

write is greater than or equal to the threshold level.

Minimum resolution for the FIFO is 1LSB = 2 bytes (1 word) in FIFO

2. For a complete watermark threshold configuration, consider FTH_[7:0] in FIFO_CTRL1 (06h)

Table 25. FIFO_CTRL3 register

0(1)

1. This bit must be set to ‘0’ for the correct operation of the device.

0(1)

DEC_FIFO

_GYRO2

DEC_FIFO

_GYRO1

DEC_FIFO

_GYRO0

DEC_FIFO

_XL2

DEC_FIFO

_XL1

DEC_FIFO

_XL0

DEC_FIFO_GYRO [2:0]

Gyro FIFO (first data set) decimation setting. Default: 000

For the configuration setting, refer to Table 27.

DEC_FIFO_XL [2:0]

Accelerometer FIFO (second data set) decimation setting. Default: 000

For the configuration setting, refer to Table 28.

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