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STM8AL3L8x 数据表(PDF) 81 Page - STMicroelectronics |
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STM8AL3L8x 数据表(HTML) 81 Page - STMicroelectronics |
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81 / 131 page  DocID027179 Rev 6 81/131 STM8AL318x STM8AL3L8x Electrical parameters 117 In the following table, data are based on characterization results, unless otherwise specified. Figure 20. Typical IDD(Halt) vs. VDD (internal reference voltage OFF) Table 27. Total current consumption and timing in Halt mode at VDD = 1.65 to 3.6 V Symbol Parameter Condition(1) Typ. Max. Unit IDD(Halt) Supply current in Halt mode (ultra-low-power ULP bit =1 in the PWR_CSR2 register) TA = -40 °C to 25 °C 0.4 0.9(2) µA TA = 85 °C 0.9 2.8(3) TA = 125 °C 4.4 13(3) IDD(WUHalt) Supply current during wakeup time from Halt mode (using HSI) -2.4 - mA tWU_HSI(Halt)(4)(5) Wakeup time from Halt to Run mode (using HSI) -4.7 7(2) µs tWU_LSI(Halt) (4)(5) Wakeup time from Halt mode to Run mode (using LSI) -150 - 1. TA = -40 to 125 °C, no floating I/O, unless otherwise specified. 2. Guaranteed by characterization results. 3. Tested at 85 °C for temperature range A or 125°C for temperature range C. 4. ULP=0 or ULP=1 and FWU=1 in the PWR_CSR2 register. 5. Wakeup time until start of interrupt vector fetch. The first word of interrupt routine is fetched 4 CPU cycles after tWU. |
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