STM32F412RG datasheet(77/193 Pages) STMICROELECTRONICS

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STM32F412xE/G

Electrical characteristics

161

Power dissipation at

TA = 85°C for range 6 or

TA = 105°C for range 7(8)

UFQFPN48

625

WLCSP64

392

LQFP64

425

LQFP100

465

LQFP144

571

UFBGA100

351

UFBGA144

416

Ambient temperature for

range 6

Maximum power dissipation

–40

°C

Low power dissipation(9)

–40

105

Ambient temperature for

range 7

Maximum power dissipation

–40

105

Low power dissipation(9)

–40

125

Junction temperature range

Range 6

–40

105

Range 7

–40

125

1. VDD/VDDA minimum value of 1.7 V with the use of an external power supply supervisor (refer to Section 3.18.2: Internal

reset OFF).

2. When the ADC is used, refer to Table 71: ADC characteristics.

3. If VREF+ pin is present, it must respect the following condition: VDDA-VREF+ < 1.2 V.

4. It is recommended to power VDD and VDDA from the same source. A maximum difference of 300 mV between VDD and

VDDA can be tolerated during power-up and power-down operation.

5. Only the DM (PA11) and DP (PA12) pads are supplied through VDDUSB. For application where the VBUS (PA9) is directly

connected to the chip, a minimum VDD supply of 2.7V is required.

(some application examples are shown in appendix B)

6. Guaranteed by test in production

7. To sustain a voltage higher than VDD+0.3, the internal Pull-up and Pull-Down resistors must be disabled

8. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJmax.

9. In low power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax.

Table 15. General operating conditions (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

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