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STM32F401CDU6 数据表(PDF) 80 Page - STMicroelectronics |
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STM32F401CDU6 数据表(HTML) 80 Page - STMicroelectronics |
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80 / 135 page  DocID024738 Rev 6 80/135 STM32F401xB STM32F401xC Electrical characteristics 113 Figure 27. ACCLSI versus temperature 6.3.10 PLL characteristics The parameters given in Table 41 and Table 42 are derived from tests performed under temperature and VDD supply voltage conditions summarized in Table 14. Table 41. Main PLL characteristics Symbol Parameter Conditions Min Typ Max Unit fPLL_IN PLL input clock(1) 0.95(2) 12.10 MHz fPLL_OUT PLL multiplier output clock 24 - 84 MHz fPLL48_OUT 48 MHz PLL multiplier output clock -48 75 MHz fVCO_OUT PLL VCO output 192 - 432 MHz tLOCK PLL lock time VCO freq = 192 MHz 75 - 200 µs VCO freq = 432 MHz 100 - 300 Jitter(3) Cycle-to-cycle jitter System clock 84 MHz RMS - 25 - ps peak to peak - ±150 - Period Jitter RMS - 15 - peak to peak - ±200 - |
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