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USB5744/2G 数据表(PDF) 12 Page - Microchip Technology |
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USB5744/2G 数据表(HTML) 12 Page - Microchip Technology |
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12 / 49 page ![]() USB5744 DS00001855D-page 12 2015-2016 Microchip Technology Inc. Note 2: Configuration strap values are latched on Power-On Reset (POR) and the rising edge of RESET_N (external chip reset). Configuration straps are identified by an underlined symbol name. Signals that function as con- figurations traps must be augmented with an external resistor when connected to a load. Refer to Section 3.4, "Configuration Straps and Programmable Functions" for additional information. 4 USB2DN_DP[4:1] IO-U USB 2.0 downstream ports 4-1 data plus (D+). PRT_DIS_P[4:1] I Port 4-1 D+ Disable Configuration Strap. These configuration straps are used in conjunction with the corre- sponding PRT_DIS_M[4:1] straps to disable the related port (4-1). Refer to Section 3.4.2, "Port Disable Configuration (PRT_DIS_P[4:1] / PRT_DIS_M[4:1])" for more information. See Note 2. 4 USB2DN_DM[4:1] IO-U USB 2.0 downstream ports 4-1 data minus (D-). PRT_DIS_M[4:1] I Port 4-1 D- Disable Configuration Strap. These configuration straps are used in conjunction with the corre- sponding PRT_DIS_P[4:1] straps to disable the related port (4-1). Refer to Section 3.4.2, "Port Disable Configuration (PRT_DIS_P[4:1] / PRT_DIS_M[4:1])" for more information. See Note 2. 1 VBUS_DET IS This signal detects the state of the upstream bus power. When designing a detachable hub, this pin must be connected to the VBUS power pin of the upstream USB port through a resistor divider (50 k by 100 k) to provide 3.3 V. For self-powered applications with a permanently attached host, this pin must be connected to either 3.3 V or 5.0 V through a resistor divider to provide 3.3 V. In embedded applications, VBUS_DET may be controlled (toggled) when the host desires to renegotiate a connection without requiring a full reset of the device. GPIO16 I/O6 General purpose input/output 16. TABLE 3-5: USB PORT CONTROL PIN DESCRIPTIONS Num Pins Symbol Buffer Type Description 1 PRT_CTL1 I (PU) Port 1 Power Enable / Overcurrent Sense. As an output, this signal is an active high control signal used to enable power to the downstream port 1. As an input, this signal indicates an overcurrent condition from an external current monitor on USB port 1. 1 PRT_CTL2 I (PU) Port 2 Power Enable / Overcurrent Sense. As an output, this signal is an active high control signal used to enable power to the downstream port 2. As an input, this signal indicates an overcurrent condition from an external current monitor on USB port 2. TABLE 3-4: USB 2.0 PIN DESCRIPTIONS (CONTINUED) Num Pins Symbol Buffer Type Description |
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