USB2503 datasheet(9/42 Pages) MICROCHIP

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 2007 - 2016 Microchip Technology Inc.

DS000002249A-page 9

USB2503/USB2503A

Port Power Polarity

strapping.

PRTPWR_POL

I/O12

Port Power Polarity strapping determination for the active

signal polarity of the PRTPWR[3:1] pins.

While RESET_N is asserted, the logic state of this pin will

(though the use of internal combinatorial logic) determine the

active state of the PRTPWR[3:1] pins in order to ensure that

downstream port power is not inadvertently enabled to

inactive ports during a hardware reset.

When RESET_N is negated, the logic value will be latched

internally, and will retain the active signal polarity for

PRTPWR[3:1] pins.

‘1’ = PRTPWR[3:1] pins have an active ‘high’ polarity

‘0’ = PRTPWR[3:1] pins have an active ‘low’ polarity

Over Current

Sense

OCS[3:1]_N

IPU

Input from external current monitor indicating an over-current

condition. {Note: Contains internal pull-up to 3.3V supply}

USB Transceiver

Bias

RBIAS

I-R

A 12.0k

 (resistor is attached from ground to this pin

to set the transceiver’s internal bias settings.

SERIAL PORT INTERFACE

Serial Data/SMB

Data

SDA/SMBDATA

IOSD12

(Serial Data)/(SMB Data) signal.

Serial Clock/SMB

Clock

Chip Select /

EEPROM Select

SCL/SMBCLK/

CFG_SEL0

IOSD12

(Serial Clock)/(SMB Clock) signal. This multifunction pin is

read on the rising edge of RESET_N negation and will

determine the hub configuration method as described in

TABLE 4-2:.

SMB Programming

Select

CFG_SEL1

This pin is read on the rising edge of RESET_N negation and

will determine the hub configuration method as described in

TABLE 4-2:.

TABLE 4-2:

SMBUS OR EEPROM INTERFACE BEHAVIOR

CFG_SEL1

CFG_SEL0

SMBus or EEPROM Interface Behavior

Configured as an SMBus slave for external download of user-defined

descriptors. SMBus slave address is: 0101101

Internal Default Configuration via strapping options.

2-wire (I2C) EEPROMS are supported, and CFG_SEL0 has no other

functionality.

TABLE 4-3:

MISCELLANEOUS PINS

Name

Symbol

Type

Function

Crystal

Input/External

Clock Input

XTAL1/

CLKIN

ICLKx

24MHz crystal or external clock input.

This pin connects to either one terminal of the crystal or to

an external 24MHz clock when a crystal is not used.

Crystal Output

XTAL2

OCLKx

24MHz Crystal

This is the other terminal of the crystal, or left unconnected

when an external clock source is used to drive

XTAL1/CLKIN. It must not be used to drive any external

circuitry other than the crystal circuit.

Clock Input

Enable

CLKIN_EN

Clock In Enable:

Low = XTAL1 and XTAL2 pins configured for use with

external crystal

High = XTAL1 pin configured as CLKIN, and must be

driven by an external CMOS clock.

TABLE 4-1:

3-PORT HUB PIN DESCRIPTIONS (CONTINUED)

Name

Symbol

Type

Function

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