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USB2504 数据表(PDF) 9 Page - Microchip Technology |
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USB2504 数据表(HTML) 9 Page - Microchip Technology |
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9 / 42 page ![]() 2007 - 2016 Microchip Technology Inc. DS000002250A-page 9 USB2504/USB2504A Port 3 Amber LED AM3 I/O12 Amber indicator LED for port 3. Signal will be active low. Port 2 Amber LED & MTT Disable AM2/ MTT_EN I/O12 Amber indicator LED for port 2. Will be active low when LED support is enabled via EEPROM or SMBus. If the hub is configured by the internal default configuration, this pin will be sampled at RESET_N negation to determine if MTT support is disabled (STT only). Also, the active state of the LED will be determined as follows: ‘0’ = MTT support is disabled, LED is active high ‘1’ = MTT support is enabled, LED is active low. Port 1 Amber LED & Gang Power Switching and Current Sensing strapping option. AM1/ GANG_EN I/O12 Amber indicator LED for port 1, Will be active low when LED support is enabled via EEPROM or SMBus. If the hub is configured by the internal default configuration, this pin will be sampled at RESET_N negation to determine if downstream port power switching and current sensing are ganged, or individual port-by-port. Also, the active state of the LED will be determined as follows: ‘0’ = Port-by-port sensing & switching, LED is active high ‘1’ = Ganged sensing & switching, LED is active low. Port Power Polarity strapping. PRTPWR_POL I/O12 Port Power Polarity strapping determination for the active signal polarity of the [4:1]PRTPWR pins. While RESET_N is asserted, the logic state of this pin will (though the use of internal combinatorial logic) determine the active state of the [4:1]PRTPWR pins in order to ensure that downstream port power is not inadvertently enabled to inactive ports during a hardware reset. On the rising edge of RESET_N (see the applicable RESET_N timing table in Section 5.6.1), the logic value will be latched internally, and will retain the active signal polarity for the PRTPWR[4:1] pins. ‘1’ = PRTPWR[4:1]_P/N pins have an active ‘high’ polarity ‘0’ = PRTPWR[4:1]_P/N pins have an active ‘low’ polarity Over Current Sense OCS[4:1]_N IPU Input from external current monitor indicating an over-current condition. {Note: Contains internal pull-up to 3.3V supply} USB Transceiver Bias RBIAS I-R A 12.0k (resistor is attached from ground to this pin to set the transceiver’s internal bias settings. SERIAL PORT INTERFACE Serial Data/SMB Data SDA/SMBDATA IOSD12 (Serial Data)/(SMB Data) signal. Serial Clock/SMB Clock SCL/SMBCLK IOSD12 (Serial Clock)/(SMB Clock) signal. Configuration Programming Select CFG_SEL0 IOSD12 This multifunction pin is read on the rising edge of RESET_N negation and will determine the hub configuration method as described in Table 4-2. Configuration Programming Select CFG_SEL1 I This pin is read on the rising edge of RESET_N (see the applicable RESET_N timing table in Section 5.6.1) and will determine the hub configuration method as described in Table 4-2. Configuration Programming Select CFG_SEL2 I This pin is read on the rising edge of RESET_N negation and will determine the hub configuration method as described in Table 4-2. TABLE 4-1: 4-PORT HUB PIN DESCRIPTIONS (CONTINUED) Name Symbol Type Function |
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