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STM32F413RHT6 数据表(PDF) 31 Page - STMicroelectronics |
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STM32F413RHT6 数据表(HTML) 31 Page - STMicroelectronics |
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31 / 207 page ![]() DocID029162 Rev 2 31/207 STM32F413xG/H Functional overview 42 3.18.3 Regulator ON/OFF and internal reset ON/OFF availability 3.19 Real-time clock (RTC) and backup registers The backup domain includes: • The real-time clock (RTC) • 20 backup registers The real-time clock (RTC) is an independent BCD timer/counter. Dedicated registers contain the second, minute, hour (in 12/24 hour), week day, date, month, year, in BCD (binary- coded decimal) format. Correction for 28, 29 (leap year), 30, and 31 day of the month are performed automatically. The RTC features a reference clock detection, a more precise second source clock (50 or 60 Hz) can be used to enhance the calendar precision. The RTC provides a programmable alarm and programmable periodic interrupts with wakeup from Stop and Standby modes. The sub-seconds value is also available in binary format. It is clocked by a 32.768 kHz external crystal, resonator or oscillator, the internal low-power RC oscillator or the high-speed external clock divided by 128. The internal low-speed RC has a typical frequency of 32 kHz. The RTC can be calibrated using an external 512 Hz output to compensate for any natural quartz deviation. Two alarm registers are used to generate an alarm at a specific time and calendar fields can be independently masked for alarm comparison. To generate a periodic interrupt, a 16-bit programmable binary auto-reload downcounter with programmable resolution is available and allows automatic wakeup and periodic alarms from every 120 µs to every 36 hours. A 20-bit prescaler is used for the time base clock. It is by default configured to generate a time base of 1 second from a clock at 32.768 kHz. The backup registers are 32-bit registers used to store 80 byte of user application data when VDD power is not present. Backup registers are not reset by a system, a power reset, or when the device wakes up from the Standby mode (see Section 3.20: Low-power modes). Table 4. Regulator ON/OFF and internal power supply supervisor availability Package Regulator ON Regulator OFF Power supply supervisor ON Power supply supervisor OFF UFQFPN48 Yes No Yes No LQFP64 Yes No Yes No WLCSP81 Yes BYPASS_REG set to VSS Yes BYPASS_REG set to VDD Yes PDR_ON set to VDD Yes PDR_ON set to VSS LQFP100 Yes No Yes No LQFP144 Yes No Yes PDR_ON set to VDD Yes PDR_ON set to VSS UFBGA100 Yes BYPASS_REG set to VSS Yes BYPASS_REG set to VDD UFBGA144 Yes BYPASS_REG set to VSS Yes BYPASS_REG set to VDD |
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