STM32F413RHT6 datasheet(40/207 Pages) STMICROELECTRONICS

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Functional overview

STM32F413xG/H

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DocID029162 Rev 2

The strong benefits of such mechanism coupled with DFSDM are:

•

Possibility to place the digital microphones close to each other

•

No need for external delay lines

•

The delay tuning is done in hardware, preventing the use of MIPs crunching algorithms

•

Possibility to change the delay tuning on the fly

•

The low power consumption and CPU time released due to the DFSDM hardware PDM

to PCM conversion

The impacted audio application are beam forming and sound source localization

3.31

Secure digital input/output interface (SDIO)

An SD/SDIO/MMC host interface is available, that supports MultiMediaCard System

Specification Version 4.2 in three different databus modes: 1-bit (default), 4-bit and 8-bit.

The interface allows data transfer at up to 50 MHz, and is compliant with the SD Memory

Card Specification Version 2.0.

The SDIO Card Specification Version 2.0 is also supported with two different databus

modes: 1-bit (default) and 4-bit.

The current version supports only one SD/SDIO/MMC4.2 card at any one time and a stack

of MMC4.1 or previous.

In addition to SD/SDIO/MMC/eMMC, this interface is fully compliant with the CE-ATA digital

protocol Rev1.1.

3.32

Controller area network (bxCAN)

The three CANs are compliant with the 2.0A and B (active) specifications with a bitrate up to

1 Mbit/s. They can receive and transmit standard frames with 11-bit identifiers as well as

extended frames with 29-bit identifiers. Each CAN has three transmit mailboxes, two receive

FIFOS with 3 stages and 28 shared scalable filter banks (all of them can be used even if one

CAN is used). 256 bytes of SRAM are allocated for CAN1 and CAN2, and 512 bytes for

CAN3.

3.33

Universal serial bus on-the-go full-speed (USB_OTG_FS)

The devices embed a USB OTG full-speed device/host/OTG peripheral with integrated

transceivers. The USB OTG FS peripheral is compliant with USB 2.0 and OTG 1.0

specifications. It features software-configurable endpoint setting and supports

suspend/resume. The USB OTG full-speed controller requires a dedicated 48 MHz clock,

which is generated by a PLL connected to the HSE oscillator. The Battery Charging

Detection (BCD) can detect and identify the type of port it is connected to (standard USB or

charger). The charging type can also be detected: Dedicated Charging Port (DCP),

Charging Downstream Port (CDP) and Standard Downstream Port (SDP).

Some packages provide a dedicated USB power rail allowing to supply the USB from a

different voltage that the rest of the device. As an example, the device can be powered with

the minimum specified supply voltage while the USB runs at the level defined by the

standard.

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