AD9751AST datasheet(2/26 Pages) AD

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REV. 0

–2–

AD9751–SPECIFICATIONS

Parameter

Min

Typ

Max

Unit

RESOLUTION

Bits

DC ACCURACY

Integral Linearity Error (INL)

–1

±0.3

LSB

Differential Nonlinearity (DNL)

–0.5

±0.2

+0.5

LSB

ANALOG OUTPUT

Offset Error

–0.025

±0.01

+0.025

% of FSR

Gain Error (Without Internal Reference)

–5

±0.5

% of FSR

Gain Error (With Internal Reference)

–7

±0.25

% of FSR

Full-Scale Output Current

2.0

20.0

Output Compliance Range

–1.0

1.25

Output Resistance

100

Ω

Output Capacitance

REFERENCE OUTPUT

Reference Voltage

1.14

1.20

1.26

Reference Output Current

100

REFERENCE INPUT

Input Compliance Range

0.1

1.25

Reference Input Resistance

Ω

TEMPERATURE COEFFICIENTS

Offset Drift

ppm of FSR/

°C

Gain Drift (Without Internal Reference)

±50

ppm of FSR/

°C

Gain Drift (With Internal Reference)

±100

ppm of FSR/

°C

Reference Voltage Drift

±50

ppm/

°C

POWER SUPPLY

Supply Voltages

AVDD

3.0

3.3

3.6

DVDD

3.0

3.3

3.6

PLLVDD

3.0

3.3

3.6

CLKVDD

3.0

3.3

3.6

Analog Supply Current (IAVDD)

Digital Supply Current (IDVDD)

3.5

4.5

PLL Supply Current (IPLLVDD)

4.5

5.1

Clock Supply Current (ICLKVDD)

10.0

11.5

Power Dissipation

4 (3 V, I

OUTFS = 20 mA)

155

165

Power Dissipation

5 (3 V, I

OUTFS = 20 mA)

216

Power Supply Rejection Ratio6—AVDD

–0.1

+0.1

% of FSR/V

Power Supply Rejection Ratio

6—DVDD

–0.04

+0.04

% of FSR/V

OPERATING RANGE

–40

+85

°C

NOTES

1Measured at I

OUTA, driving a virtual ground.

2Nominal full-scale current, I

OUTFS, is 32

× the I

REF current.

3An external buffer amplifier is recommended to drive any external load.

4100 MSPS f

DAC with PLL on, fOUT = 1 MHz, all supplies = 3.0 V.

5300 MSPS f

DAC.

± 5% power supply variation.

Specifications subject to change without notice.

(TMIN to TMAX, AVDD = 3.3 V, DVDD = 3.3 V, PLLVDD = 3.3 V, CLKVDD = 3.3 V, IOUTFS = 20 mA, unless otherwise

noted.)

DC SPECIFICATIONS

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