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TUSB2136 数据表(PDF) 10 Page - Texas Instruments |
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TUSB2136 数据表(HTML) 10 Page - Texas Instruments |
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10 / 50 page ![]() 1–4 1.5 Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION DM0 19 I/O Differential data-minus USB port 0: upstream DM1 6 I/O Differential data-minus port-1: downstream DM2 63 I/O Differential data-minus port-2: downstream DP0 18 I/O Differential data-plus USB port 0: upstream DP1 7 I/O Differential data-plus port-1: downstream DP2 64 I/O Differential data-plus port-2: downstream GND 5, 20, 24, 42, 59 — Power supply ground OVCR1 4 I Port-1: Overcorrect indicator; Schmitt-trigger input, 100- µA active pullup OVCR2 1 I Port-2: Overcorrect indicator; Schmitt-trigger input, 100- µA active pullup P0.[0:7] 43, 44, 45, 46, 47, 48, 49, 50 I/O General-purpose I/O port 0 bits 0–7, Schmitt-trigger input, 100- µA active pullup, open drain output† P1.[0:7] 31, 32, 33, 34, 35, 36, 40, 41 I/O General-purpose I/O port 1 bits 0–7, Schmitt-trigger input, 100- µA active pullup, open drain output† P2.[0:7] 22, 23, 25, 26, 27, 28, 29, 30 I/O General-purpose I/O port 2 bits 0–7, Schmitt-trigger input, 100- µA active pullup, open drain output† P3.0/S0/RXD 58 I/O P3.0: General-purpose I/O port 3 bit 0, Schmitt-trigger input, 100- µA active pullup, open drain output† S0: See Section 2.6.12 RXD: Can be used as a UART interface P3.1/S1/TXD 57 I/O P3.1: General-purpose I/O port 3 bit 1, Schmitt-trigger input, 100- µA active pullup, open drain output† I/O S1: See Section 2.6.12 I/O TXD: Can be used as a UART interface P3.2 56 I/O General-purpose I/O port 3 bit 2, Schmitt-trigger input, 100- µA active pullup, open drain output†; INT0 only used internally (see Section 2.9.4) P3.3 55 I/O General-purpose I/O port 3 bit 3, Schmitt-trigger input, 100- µA active pullup, open drain output†; may support INT1 input, depending on configuration (see Figure 2–5) P3.[4:7] 54, 53, 52, 51 I/O General-purpose I/O port 3 bit 4, Schmitt-trigger input, 100- µA active pullup, open drain output† PUR 17 O Pullup resistor connection pin (3-state); push-pull CMOS output ( ±8 mA) PWRO1 3 O Port-1: power on/off control signal; push-pull CMOS output ( ±8mA) PWRO2 2 O Port-2: power on/off control signal; push-pull CMOS output ( ±8mA) RST 13 I Controller master reset signal, Schmitt-trigger input, 100- µA active pullup S2 8 I General-purpose input; can be used for VID/PID selection under firmware control. This input has no internal pullup, so it must be driven/pulled either low or high and connot be left unconnected. S3 9 I General-purpose input. This input has no internal pullup, so it must be driven/pulled either low or high and connot be left unconnected. SCL 12 O Serial clock I2C; push-pull output SDA 11 I/O Serial data I2C; open drain output† SELF/BUS 21 I USB power MODE select: self-powered (HIGH), bus-powered (LOW) SUSP 16 O Suspend status signal: suspended (HIGH); unsuspended (LOW) TEST0‡ 14 I Test input0, Schmitt-trigger input, 100- µA active pullup TEST1‡ 15 I Test input1, Schmitt-trigger input, 100- µA active pullup † All open-drain output pins can sink up to 8 mA. ‡ The functions controlled by TEST0 and TEST1 are shown in the following table. Because these two pins have internal pullups, they can be left unconnected for the default mode. |
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