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AD8556ACPZ-R2 数据表(PDF) 24 Page - Analog Devices |
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AD8556ACPZ-R2 数据表(HTML) 24 Page - Analog Devices |
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24 / 28 page ![]() Data Sheet AD8556 Read Mode The values stored by the polysilicon fuses can be sent to the FILT/DIGOUT pin to verify correct programming. Normally, the FILT/DIGOUT pin is only connected to the second gain stage output via RF. During read mode, however, the FILT/DIGOUT pin is also connected to the output of a shift register to allow the polysilicon fuse contents to be read. Because VOUT is a buffered version of FILT/DIGOUT, VOUT also outputs a digital signal during read mode. Read mode is entered by setting Field 1 to 11 and selecting the desired parameter in Field 2. Field 4 is ignored. The parameter value, stored in the polysilicon fuses, is loaded into an internal shift register, and the MSB of the shift register is connected to the FILT/DIGOUT pin. Pulses at DIGIN shift out the shift register contents to the FILT/DIGOUT pin, allowing the 8‒bit parameter value to be read after seven additional pulses; shifting occurs on the falling edge of DIGIN. An eighth pulse at DIGIN disconnects FILT/DIGOUT from the shift register and terminates the read mode. If a parameter value is less than eight bits long, the MSBs of the shift register are padded with 0s. For example, to read the second stage gain, this code is used: 1000 0000 0001 11 00 10 0000 0000 0111 1111 1110. Because the second stage gain parameter value is only three bits long, the FILT/DIGOUT pin has a value of 0 when this code is entered, and remains 0 during four additional pulses at DIGIN. The fifth, sixth, and seventh pulses at DIGIN return the 3-bit value at FILT/DIGOUT, the seventh pulse returns the LSB. An eighth pulse at DIGIN terminates the read mode. Sense Current A sense current is sent across each polysilicon fuse to determine whether it has been blown. When the voltage across the fuse is less than approximately 1.5 V, the fuse is considered not blown, and Logic 0 is output from the OTP cell. When the voltage across the fuse is greater than approximately 1.5 V, the fuse is considered blown, and Logic 1 is output. When the AD8556 is manufactured, all fuses have a low resistance. When a sense current is sent through the fuse, a voltage less than 0.1 V is developed across the fuse, which is much lower than 1.5 V; therefore, Logic 0 is output from the OTP cell. When a fuse is electrically blown, it should have a very high resistance. When the sense current is applied to the blown fuse, the voltage across the fuse should be larger than 1.5 V; therefore, Logic 1 is output from the OTP cell. It is theoretically possible, though very unlikely, for a fuse to be incompletely blown during programming, assuming the required conditions are met. In this situation, the fuse could have a medium resistance, neither low nor high, and a voltage of approximately 1.5 V could be developed across the fuse. Therefore, the OTP cell could output Logic 0 or Logic 1, depending on temperature, supply voltage, and other variables. To detect this undesirable situation, the sense current can be lowered by a factor of 4 using a specific code. The voltage developed across the fuse would then change from 1.5 V to 0.38 V, and the output of the OTP would be Logic 0 instead of the expected Logic 1 from a blown fuse. Fuses blown correctly would still output Logic 1. In this way, fuses blown incorrectly can be detected. Another specific code would return the sense current to the normal (larger) value. The sense current cannot be permanently programmed to the low value. When the AD8556 is powered up, the sense current defaults to the high value. The low sense current code is: 1000 0000 0001 00 00 10 XXXX XXX1 0111 1111 1110. The normal (high) sense current code is: 1000 0000 0001 00 00 10 XXXX XXX0 0111 1111 1110. Programming Procedure For reliable fuse programming, it is imperative to follow the programming procedure requirements, especially the proper supply voltage during programming. 1. When programming the AD8556, the temperature of the device must be between 10°C and 40°C. 2. Set VDD and VSS to the desired values in the application. Use simulation mode to test and determine the desired codes for the second stage gain, first stage gain, and output offset. The nominal values for these parameters are shown in Table 6, Table 7, Equation 2, and Equation 3; use the codes corresponding to these values as a starting point. However, because actual parameter values for given codes vary from device to device, some fine tuning is necessary for the best possible accuracy. One way to choose these values is to set the output offset to an approximate value, such as Code 128 for midsupply, to allow the required gain to be determined. Then set the second stage gain so the minimum first stage gain (Code 0) gives a lower gain than required, and the maximum first stage gain (Code 127) gives a higher gain than required. After choosing the second stage gain, the first stage gain can be chosen to fine tune the total gain. Finally, the output offset can be adjusted to give the desired value. After determining the desired codes for second stage gain, first stage gain, and output offset, the device is ready for permanent programming. Rev. B | Page 23 of 27 |
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