AD8505/AD8506/AD8508

Rev. E | Page 14 of 20

The charge pump has been carefully designed so that switching

noise components at any frequency, both within and beyond the

amplifier bandwidth, are much lower than the thermal noise floor.

Therefore, the spurious-free dynamic range (SFDR) is limited only

by the input signal and the thermal or flicker noise. There is no

intermodulation between the input signal and the switching noise.

Figure 47 displays a typical front-end section of an operational

amplifier with an on-chip charge pump.

Q2

Q1

+IN

–IN

OUT

CASCODE

STAGE

AND

RAIL-TO-RAIL

OUTPUT

STAGE

Figure 47. Typical Front-End Section of an Op Amp

with Embedded Charge Pump

Figure 48, the input offset voltage vs. input common-mode voltage

response, shows the typical response of 12 devices. Figure 48 is

expanded to make it easier to compare with Figure 46, the typical

input offset voltage vs. common-mode voltage response in a

dual differential pair input stage op amp.

0

–300

–100

100

300

1.5

3.5

5.0

1.0

0.5

2.5

4.5

4.0

3.0

2.0

–200

–150

–250

–50

0

50

150

200

250

Figure 48. Input Offset Voltage vs. Input Common-Mode Voltage Response

(Powered by a 5 V Supply; Results of 12 Units Are Displayed)

This solution improves the CMRR performance tremendously.

For instance, if the input varies from rail to rail on a 2.5 V

supply rail, using a part with a CMRR of 70 dB minimum, an

input-referred error of 790 μV is introduced. Another part with

a CMRR of 52 dB minimum generates a 6.3 mV error. The

AD8505/AD8506/AD8508 CMRR of 90 dB minimum causes only

a 79 μV error. As with the PSRR error, there are complex ways to

minimize this error, but the AD8505/AD8506/AD8508 amplifiers

solve this problem without incurring unnecessary circuitry

complexity or increased cost.